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Slide No. 12 (AND, OR, NOT, XOR, MASKING).pptx
- 1. BITWISE LOGICAL INSTRUCTIONS AND | OR | NOT | XOR Presented By Prof. Hamza Afzal
- 3. AND instructions in Assembly • AND Destination, Source • Both Operand Must be Same Size • Example • AND reg, reg • And reg, mem • AND reg, imm • AND mem, reg • AND mem, imm 1 If both operands are 1 otherwise 0
- 4. OR instructions in Assembly • OR Destination, Source • Both Operand Must be Same Size • Example • OR reg, reg • OR reg, mem • OR reg, imm • OR mem, reg • OR mem, imm 1 If any one of the operands are 1 otherwise 0
- 5. XOR instructions in Assembly • XOR Destination, Source • Both Operand Must be Same Size • Example • XOR reg, reg • XOR reg, mem • XOR reg, imm • XOR mem, reg • XOR mem, imm • Different 1 • Same 0
- 6. XOR instructions in Assembly 0 if both operands are same otherwise 1
- 7. NOT instructions in Assembly • OR Destination • Work with single operand Inverts the operand
- 8. MASKING OPERATIONS Selective Bit Clearing Selective Bit Setting Selective Bit Inversion
- 9. What is Mask? • A mask is a bit pattern that has been defined by the programmer, which allows specific bits in a piece of data to be tested or altered. • TYPES • Selective Bit Clearing • Selective Bit Setting • Selective Bit Inversion
- 10. Selective Bit Clearing (AND) • It means that we want some specific bits to be zero. • Mask: 1111 0000 • AND al, 0×F0 • Al 10101010 • 11110000 • --------------------- • And 10100000 F 0
- 11. Selective Bit Setting (OR) • It means that we want some specific bits to be 1 then the mask is set by 1. • Mask: 0000 1111 • OR al, 0×0F • Al 10101010 • 00001111 • --------------------- • OR 10101111 F 0
- 12. Selective Bit Inversion (XOR) • It means that we want some specific bits to be invert then the mask is set by 1 in masking and another retain value is set by 0. • We want even values will be invert • mask: 10101010 • XOR al, mask • Al 11010001 • 10101010 • --------------------- • XOR 01111011 Invert 01234567