plano esquematico lenovo g485

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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Cover Page
B
1 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Cover Page
B
1 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Cover Page
B
1 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
AMD APU Zacate-FT1 + FCH Hudson-M3L + GPU RobsonXT
PAWGE Schematics Document
REV:1.0
Compal Confidential
2011-11-21
WWW.AliSaler.Com

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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Block Diagrams
B
2 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Block Diagrams
B
2 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Block Diagrams
B
2 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
CRT Conn.
BGA 656-Ball
23mm x 23mm
AMD Brazos APU
x4 UMI Gen. 2
Hudson M3L
page 5,6,7
page 10,11,12,13,14
LVDS Conn.
Single Channel BANK 0, 1, 2, 3
200pin DDRII-SO-DIMM X2
1.5V DDRIII 1333
Memory BUS(DDRIII)
page 8,9
HDMI Conn.
WLAN &WiMax
GIGA LAN
4 * x1 PCI-E 1.0
FT1
BGA 413-Ball
19mm x 19mm
RTL8111/8105
DDR3*4
AMDRosbon XT_M2
VRAM 64*16 x4 PCI-E GPP GEN2
WLAN/WiMAX
USB PORT 2.0 x2(Left)
SATA3.0 HDD CONN
SATA ODD CONN
2*SATA serial
Internal MIC
BlueTooth CONN
CMOS Camera
CX20671
Audio Codec
2Channel Speaker
AZALIA
10*USB2.0
Audio Jacks
Stereo
HeadPhone Output
Microphone Input
USB PORT 3.0 x2(Right)
Card Reader
Realtek RTS5178
SD/MMC
LPC BUS
Int.KBD
ENE KB9012
Touch Pad
EC
EMC1403
Thermal Sensor
PCI Express
Mini card Slot 1
WLAN/WiMAX
PCI-E(WLAN)
USB(WiMAX)
File Name : PAWGE
Compal confidential
page 22
page 24
page 23
page 15 ~ 21
page 25,26
page 27
page 27
page 27
page 29
page 28
page 28
page 29
page 29
page 30
page 32
page 32
page 33
page 34
page 28
page 22
page 11
SPI ROM
LS7982P USB/B
LS7983P PWR/B
LS7981P CardReader/B
QIWG5
LS7982P USB/B
LS7983P PWR/B
LS7984P LED/B
LS7981P CardReader/B
LS7985P ODD/B
QIWG6
Daoughter board
WWW.AliSaler.Com

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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Notes List
B
3 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Notes List
B
3 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
Notes List
B
3 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
+APU_CORE_NB 1.0V switched power rail ON OFF
+0.75VS 0.75VS switched power rail for DDR terminator
+RTCVCC RTC power
+1.8VS 1.8V switched power rail
+5VS
+3VS
+5VALW
+1.5V
+3VALW
1.5V power rail for CPU VDDIO and DDRIII
3.3V always on power rail
5V always on power rail
3.3V switched power rail
5V switched power rail
+VSB VSB always on power rail ON ON*
ON
ON
ON
ON
ON
OFF
OFF
+APU_CORE
Voltage Rails
VIN
B+
+1.0VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU (0.7-1.2V)
OFF
1.0V switched power rail for NB VDDC & VGA
+1.1VS 1.1VS switched power rail ON OFF OFF
ON ON*
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON(WOL) OFF
S1 S3 S5
ON OFF
ON
N/A N/A N/A
N/A
N/A
N/A
Power Plane Description
OFF
OFF
ON
OFF
OFF
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
OFF
ON
ON
ON
ON ON*
OFF
OFF
ON
OFF
EC SM Bus1 address
Device
SM Bus Controller 0
Device Address
Address Address
EC SM Bus2 address
Device
Smart Battery 0001-011xb
HEX
HEX
HEX
9AH
SB-TSI
ON ON*
ON
+1.1VALW 1.1V always on power rail
EMC1412-2 (dGPU)
EMC1403-2(DDR,WLAN)
1111-100xb
1001-101xb
1001-100xb 98H
SM Bus Controller 1
Device Address HEX
DDR DIMM1 (FCH_SMB0)
DDR DIMM2 (FCH_SMB0)
1001-000xb
1001-001xb
90
92
WLAN (FCH_SMB0)
APU SIC/SID (FCH_SMB3)
(FCH_SMB1 ~ FCH_SMB4, SMB_ALERT#)
(FCH_SMB0)
H_THERMTRIP# (FCH_ALERT#)
FCH Hudson-M3L
USB Port List
USB1.1
USB2.0
Port0
Port1
Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11
Port12
Port13
Left USB1
USB Camera
Left USB2
Right USB
BT
CardReader
Mini-PCIE
NC
NC
NC
NC
NC
NC
NC
NC
Brazos
PCIE Port List
PCIE0
PCIE1
PCIE2
PCIE3
PCIE0
PCIE1
PCIE2
PCIE3
APU
FCH
GPU
PCIE x4
LAN
WLAN
NC
NC
FCH Hudson-M3L
SATA Port List
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5
HDD
ODD
NC
NC
NC
BOM Structure
UMA@ : UMA only
PX@ : DIS muxluss PX 4.0
GIGA@ : RTL8111 1000
CMOS@ : USB camera
BT@ : BT function
ME@ : ME components
X76@, H1G@, H512@, S1G@, S512@ : VRAM
45@ : 45 Level
F8H
15H
Right USB
NC
HDMI@ : HDMI function
DIMM@ : DIMM select
AN@ : Apple + Nokia ear phone combo
A@ : Apple ear phone
8105@ : RTL8105 10/100
non HDMI@ : HDMI function
PCB@ : PCB PN
14@ : 14"
15@ : 15"
BBH@ : BBH
nonBBH@@ : nonBBH@
Robson@ : Robson GPU
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
dGPU Block Diagram
B
4 48
Tuesday, November 29, 2011
2010/06/30 2012/07/14
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
dGPU Block Diagram
B
4 48
Tuesday, November 29, 2011
2010/06/30 2012/07/14
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
dGPU Block Diagram
B
4 48
Tuesday, November 29, 2011
2010/06/30 2012/07/14
Compal Electronics, Inc.
Note: Do not drive any IOs before VDDR3 is ramped up.
VDD_CT(1.8V)
VDDR3(3.3VGS)
VDDC/VDDCI(1.12V)
PERSTb
Straps Reset
Straps Valid
REFCLK
VDDR1(1.5VGS)
Power-Up/Down Sequence
1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-up
sequence, though a shorter ramp-up duration is preferred.
2. VDDR3 should ramp-up before or simultaneously with VDDC.
3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before
DPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10.
4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and
VDD_CT have ramped up.
5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to
ramp-up (or vice versa).)
PCIE_VDDC(1.0V)
Global ASIC Reset
T4+16clock
dGPU Power Pins Max current
1679mA
575mA
2A
190mA
70mA
2.8A
12.9A
PCIE_PVDD, PCIE_VDDR, TSVDD, VDDR4, VDD_CT,
DPE_PVDD, DP[F:E]_VDD18, DP[D:A]_PVDD,
DP[D:A]_VDD18, AVDD, VDD1DI, A2VDDQ, VDD2DI,
DPLL_PVDD, MPV18, and SPV18
DP[F:E]_VDD10, DP[D:A]_VDD10, DPLL_VDDC, and
SPV10
PCIE_VDDC
VDDR3 , and A2VDD
BIF_VDDC (current consumption = 55mA@1.0V, in
BACO mode)
BIF_VDDC=VGA_CORE When GPU enable
BIF_VDDC=1.0V When BACO
VDDR1
VDDC/VDDCI
Voltage
1.8V
1.0V
1.0V
3.3V
VDDC
Same as
1.5V
1.12V
PX 3.0
OFF
MOS
OFF
OFF
OFF
OFF
OFF
OFF
BACO Mode
ON
ON
ON
ON
ON
Same as
PCIE_VDDC
OFF
OFF
+1.0VGS
+3.3VGS
+1.5VGS
+VGA_CORE
+1.8VGS
iGPU
+1.0V
dGPU
+3.3VALW
PXS_PWREN
+1.5V
+B
+1.8V
PXS_RST# PE_EN BACO Switch
BIF_VDDC
PX_mode
PWRGOOD
PXS_RST# : Low -> Reset dGPU ; High ->Normal operation
PXS_PWREN : Low -> dGPU Power OFF ; High -> dGPU Power ON
Without BACO option :
BACO option :
PXS_RST# : High ->Normal operation (dGPU is not reset on BACO mode)
PXS_PWREN : Low -> dGPU Power OFF ; High -> dGPU Power ON (always High)
SI4800
SI4800
Regulator
Regulator
1
2 3
4
5
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5. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
APU_RST#
APU_PWRGD
APU_SVC
APU_PROCHOT#
APU_THERMTRIP#
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
DP_ZVSS
LTDP0_HPD
APU_SVD
APU_ALERT#_R
TEST19
TEST18
DAC_ZVSS
TEST25_H
TEST_25_L
HDMI_TX2N_C
HDMI_TX2P_C
HDMI_TX0N_C
HDMI_TX0P_C
HDMI_TX1N_C
HDMI_TX1P_C
HDMI_CLKN_C
HDMI_CLKP_C
APU_PROCHOT#
APU_THERMTRIP#
TEST28_L
TEST28_H
TEST31
TEST36
TEST37
TEST15
TEST_25_L
TEST33_H
TEST33_L
TEST36
EDID_CLK
EDID_DATA
APU_DBREQ#
J108_PLLTST0
APU_TDO
J108_PLLTST1
APU_PWRGD
TEST19
TEST18
APU_TRST#_R
APU_RST#
APU_TCK
APU_DBRDY
APU_TMS
APU_DBREQ#
APU_TRST#
APU_TDI
APU_ALERT#_R
TEST35
EDID_CLK
EDID_DATA
EC_SMB_DA2_R
EC_SMB_CK2_R
APU_CLK
<10>
APU_CLK#
<10>
APU_DISP_CLK
<10>
APU_DISP_CLK#
<10>
APU_RST#
<10>
APU_PWRGD
<10,44>
H_THERMTRIP# <12>
HDMI_DET <23>
ALLOW_STOP# <10>
APU_ENBKL <22>
APU_ENVDD <22>
APU_BLPWM <22>
DAC_RED <24>
DAC_GRN <24>
DAC_BLU <24>
CRT_HSYNC <24>
CRT_VSYNC <24>
CRT_DDC_CLK <24>
CRT_DDC_DATA <24>
APU_SVC
<44>
APU_SVD
<44>
EDID_CLK <22>
EDID_DATA <22>
LVDS_A2
<22>
LVDS_A2#
<22>
LVDS_ACLK
<22>
LVDS_ACLK#
<22>
LVDS_A0
<22>
LVDS_A0#
<22>
LVDS_A1
<22>
LVDS_A1#
<22>
HDMI_TX2N
<23>
HDMI_TX2P
<23>
HDMI_TX1N
<23>
HDMI_TX1P
<23>
HDMI_TX0N
<23>
HDMI_TX0P
<23>
HDMI_CLKN
<23>
HDMI_CLKP
<23>
H_PROCHOT#
<10,30,37>
HDMI_DATA <23>
HDMI_CLK <23>
APU_VDD0_RUN_FB_L
<44>
APU_VDDNB_RUN_FB_H
<44>
APU_VDD0_RUN_FB_H
<44>
EC_SMB_DA2
<16,29,30>
EC_SMB_CK2
<16,29,30>
+1.8VS
+3VS
+3VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS +1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
FT1 CTRL/DP/CRT
Custom
5 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
FT1 CTRL/DP/CRT
Custom
5 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
FT1 CTRL/DP/CRT
Custom
5 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30
Compal Electronics, Inc.
TO EC
If FCH internal pull-up disabled, level-shifter could be deleted.
Need BIOS to disable internal pull-up!!
AMD Debug
Please be noted about TEST_18 and TEST_19
HDMI function enable R958 mount
disable R422 mount
Delete Test point for layout limitation
20100818
need to pop for HDT debug
20101012
need to pop for HDT debug
20101012
AMD check list update
20101110
check the connect need or not
R427 0_0402_5%
@
R427 0_0402_5%
@
1 2
R421 51_0402_1%
R421 51_0402_1%
1 2
T77PAD
T77PAD
R415 1K_0402_5%
@
R415 1K_0402_5%
@
1 2
C517 0.1U_0402_16V4Z
C517 0.1U_0402_16V4Z
1 2
C512 0.1U_0402_16V7K
HDMI@
C512 0.1U_0402_16V7K
HDMI@
1 2
T66
PAD T66
PAD
C1022
100P_0402_50V8J
@C1022
100P_0402_50V8J
@
1
2
T71
PAD T71
PAD
C515 0.1U_0402_16V7K
HDMI@
C515 0.1U_0402_16V7K
HDMI@
1 2
R848 10K_0402_5%
@
R848 10K_0402_5%
@ 1
2
R398 150_0402_1%
R398 150_0402_1%
1 2
R405 300_0402_5%
R405 300_0402_5%
1
2
R845 1K_0402_5%
R845 1K_0402_5%
1
2
C510 0.1U_0402_16V7K
HDMI@
C510 0.1U_0402_16V7K
HDMI@
1 2
R852 0_0402_5%
@
R852 0_0402_5%
@
1 2
R409 150_0402_1%
R409 150_0402_1%
1 2
R843 1K_0402_5%
R843 1K_0402_5%
1
2
C509 0.1U_0402_16V7K
HDMI@
C509 0.1U_0402_16V7K
HDMI@
1 2
AAAU6
PCB 0R3 LA-8681P REV0 M/B
PCB@
AAAU6
PCB 0R3 LA-8681P REV0 M/B
PCB@ BBBU22
EM1800GBB22GV
E1800@
BBBU22
EM1800GBB22GV
E1800@
T67
PAD T67
PAD
R958 1K_0402_5%
HDMI@
R958 1K_0402_5%
HDMI@
1 2
R423 1K_0402_5%
R423 1K_0402_5%
1 2
R413 499_0402_1%
R413 499_0402_1%
1 2
R808 0_0402_5%
R808 0_0402_5%
1 2
R419 510_0402_1%
R419 510_0402_1%
1 2
C513 0.1U_0402_16V7K
HDMI@
C513 0.1U_0402_16V7K
HDMI@
1 2
R411 1K_0402_5%
R411 1K_0402_5%
1 2
R406 100K_0402_5%
R406 100K_0402_5%
1 2
T69
PAD T69
PAD
T73
PAD T73
PAD
TEST
VGA
DAC
JTAG
CTRL
SER
CLK
DP
MISC
DISPLAYPORT
0
DISPLAYPORT
1
U22B
S IC E SERIES EME450GBB22GVA 1.65G BGA
TEST
VGA
DAC
JTAG
CTRL
SER
CLK
DP
MISC
DISPLAYPORT
0
DISPLAYPORT
1
U22B
S IC E SERIES EME450GBB22GVA 1.65G BGA
RSVD_3
V5
RSVD_2
W11
RSVD_1
B4
VSS_SENSE
F1
VDDIO_MEM_S_SENSE
F3
VDDCR_CPU_SENSE
G1
VDDCR_NB_SENSE
F4
DBREQ_L
M1
DBRDY
M3
TRST_L
M4
TCK
P1
TDO
N1
TDI
N2
ALERT_L
T2
THERMTRIP_L
U2
PROCHOT_L
U1
PWROK
T4
RESET_L
T3
SID
P4
SIC
P3
SVD
J2
SVC
J1
DISP_CLKIN_L
D1
DISP_CLKIN_H
D2
CLKIN_L
V1
CLKIN_H
V2
LTDP0_TXN3
C8
LTDP0_TXP3
D8
LTDP0_TXN2
B6
LTDP0_TXP2
A6
LTDP0_TXN1
C6
LTDP0_TXP1
D6
LTDP0_TXN0
A5
LTDP0_TXP0
B5
TDP1_TXP3
A10
TDP1_TXN2
C10
TDP1_TXN1
A9
TDP1_TXP1
B9
TDP1_TXN0
B8
TDP1_TXP0
A8
DMAACTIVE_L
T1
TEST38
K3
TEST37
R5
TEST36
N5
TEST35
H4
TEST34_L
T15
TEST34_H
U15
TEST33_L
J19
TEST33_H
J18
TEST31
M21
TEST28_L
M5
TEST28_H L5
TEST25_L K2
TEST25_H K1
TEST19 M2
TEST18 L2
TEST17 L1
TEST16 K4
TEST15 E4
TEST14 T5
TEST6 R6
TEST5 R2
TEST4 R1
DAC_ZVSS D12
DAC_SDA D4
DAC_SCL F2
DAC_VSYNC E2
DAC_HSYNC E1
DAC_BLUEB B13
DAC_BLUE A13
DAC_GREENB B12
DAC_GREEN A12
DAC_REDB D13
DAC_RED C12
LTDP0_HPD
D3
LTDP0_AUXN
B3
LTDP0_AUXP
A3
TDP1_HPD
C1
TDP1_AUXN
C2
TDP1_AUXP
B2
DP_VARY_BL
H1
DP_DIGON
H2
DP_BLON
G2
DP_ZVSS H3
TDP1_TXP2
D10
TDP1_TXN3
B10
TMS
P2
T76
PAD T76
PAD
R404 1K_0402_5%
R404 1K_0402_5%
1 2
R510 4.7K_0402_5%
R510 4.7K_0402_5%
1 2
E
B
C
Q79
MMBT3904_NL_SOT23-3
E
B
C
Q79
MMBT3904_NL_SOT23-3
2
3 1
R416 1K_0402_5%
R416 1K_0402_5%
1 2
JHDT1
SAMTE_ASP-136446-07-B
@
JHDT1
SAMTE_ASP-136446-07-B
@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
R407 150_0402_1%
R407 150_0402_1%
1 2
R846 0_0402_5%
@
R846 0_0402_5%
@
1 2
R399 1K_0402_5%
R399 1K_0402_5%
1 2
R511 4.7K_0402_5%
R511 4.7K_0402_5%
1 2
R809 0_0402_5%
R809 0_0402_5%
1 2
R847 10K_0402_5%
@
R847 10K_0402_5%
@ 1
2
R425
1K_0402_5%
R425
1K_0402_5%
1
2
R842
1K_0402_5%
R842
1K_0402_5%
1
2
C511 0.1U_0402_16V7K
HDMI@
C511 0.1U_0402_16V7K
HDMI@
1 2
R403 1K_0402_5%
R403 1K_0402_5%
1 2
T72
PAD T72
PAD
R844 1K_0402_5%
R844 1K_0402_5%
1
2
R401 300_0402_5%
R401 300_0402_5%
1
2
C514 0.1U_0402_16V7K
HDMI@
C514 0.1U_0402_16V7K
HDMI@
1 2
R400 1K_0402_5%
R400 1K_0402_5%
1 2
R410 1K_0402_5%
R410 1K_0402_5%
1 2
R408 150_0402_1%
R408 150_0402_1%
1 2
C516 0.1U_0402_16V4Z
C516 0.1U_0402_16V4Z
1 2
R424
10K_0402_5%
R424
10K_0402_5%
1
2
R417 1K_0402_5%
R417 1K_0402_5%
1 2
R402 510_0402_1%
R402 510_0402_1%
1 2
R851 0_0402_5%
@
R851 0_0402_5%
@
1 2
R420 51_0402_1%
R420 51_0402_1%
1 2
T68
PAD T68
PAD
R849 10K_0402_5%
@
R849 10K_0402_5%
@ 1
2
C508 0.1U_0402_16V7K
HDMI@
C508 0.1U_0402_16V7K
HDMI@
1 2
R810 0_0402_5%
R810 0_0402_5%
1 2
AAAU22
EM1200GBB22GV
E1200@
AAAU22
EM1200GBB22GV
E1200@
T95
PAD T95
PAD
R422 1K_0402_5%
non HDMI@
R422 1K_0402_5%
non HDMI@
1 2
WWW.AliSaler.Com

6. A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
DDR_A_MA15
DDR_A_MA12
DDR_A_MA14
DDR_A_MA13
DDR_A_MA11
DDR_A_MA10
DDR_A_MA6
DDR_A_MA1
DDR_A_MA7
DDR_A_MA2
DDR_A_MA3
DDR_A_MA8
DDR_A_MA5
DDR_A_MA4
DDR_A_MA9
DDR_A_MA0
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0
DDR_A_DM7
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_CLK#1
DDR_A_CLK#0
DDR_A_CLK0
DDR_A_CLK1
+MEM_VREF
DDR_A_D33
DDR_A_D32
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D38
DDR_A_D39
DDR_A_D19
DDR_A_D22
DDR_A_D23
DDR_A_D16
DDR_A_D17
DDR_A_D21
DDR_A_D20
DDR_A_D29
DDR_A_D24
DDR_A_D28
DDR_A_D27
DDR_A_D18
DDR_A_D26
DDR_A_D30
DDR_A_D31
DDR_A_D25
DDR_A_D47
DDR_A_D40
DDR_A_D41
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D46
DDR_A_D1
DDR_A_D5
DDR_A_D0
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D6
DDR_A_D7
DDR_A_D62
DDR_A_D63
DDR_A_D57
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D56
DDR_A_D58
DDR_A_D8
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D14
DDR_A_D15
DDR_A_D9
DDR_A_D13
DDR_A_D49
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D54
DDR_A_D48
DDR_A_D55
DDR_A_ODT1
DDR_A_ODT0
DDR_EVENT#
DDR_RST#
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_CKE0
DDR_CKE1
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
+MEM_VREF
M_ZVDDIO_MEM_S
DDR_B_ODT1
DDR_B_ODT0
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#
DDR_B_CLK#3
DDR_B_CLK#2
DDR_B_CLK2
DDR_B_CLK3
P_ZVDD_10
UMI_TX2P_C
UMI_TX2N_C
UMI_TX3P_C
UMI_TX3N_C
UMI_TX0P_C
UMI_TX0N_C
UMI_TX1P_C
UMI_TX1N_C
P_ZVSS
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P3
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3
DDR_EVENT#
DDR_A_BS0
<8,9>
DDR_A_BS1
<8,9>
DDR_A_BS2
<8,9>
DDR_A_DQS0
<8,9>
DDR_A_DQS1
<8,9>
DDR_A_DQS2
<8,9>
DDR_A_DQS3
<8,9>
DDR_A_DQS4
<8,9>
DDR_A_DQS5
<8,9>
DDR_A_DQS6
<8,9>
DDR_A_DQS7
<8,9>
DDR_A_DQS#0
<8,9>
DDR_A_DQS#1
<8,9>
DDR_A_DQS#2
<8,9>
DDR_A_DQS#3
<8,9>
DDR_A_DQS#4
<8,9>
DDR_A_DQS#5
<8,9>
DDR_A_DQS#6
<8,9>
DDR_A_DQS#7
<8,9>
DDR_A_CLK0
<8>
DDR_A_CLK#0
<8>
DDR_A_CLK1
<8>
DDR_A_CLK#1
<8>
DDR_RST#
<8,9>
DDR_EVENT#
<8,9>
DDR_A_RAS#
<8,9>
DDR_A_CAS#
<8,9>
DDR_A_WE#
<8,9>
DDR_A_ODT0
<8>
DDR_A_ODT1
<8>
DDR_CKE0
<8,9>
DDR_CKE1
<8,9>
DDR_CS0_DIMMA#
<8>
DDR_CS1_DIMMA#
<8>
DDR_B_ODT0
<9>
DDR_B_ODT1
<9>
DDR_CS0_DIMMB#
<9>
DDR_CS1_DIMMB#
<9>
DDR_B_CLK2
<9>
DDR_B_CLK#2
<9>
DDR_B_CLK3
<9>
DDR_B_CLK#3
<9>
UMI_TX0P <10>
UMI_TX1N <10>
UMI_TX0N <10>
UMI_TX1P <10>
UMI_TX2P <10>
UMI_TX2N <10>
UMI_TX3N <10>
UMI_TX3P <10>
UMI_RX3P
<10>
UMI_RX3N
<10>
UMI_RX2P
<10>
UMI_RX2N
<10>
UMI_RX1P
<10>
UMI_RX1N
<10>
UMI_RX0P
<10>
UMI_RX0N
<10>
DDR_A_MA[0..15] <8,9>
DDR_A_D[0..63] <8,9>
DDR_A_DM[0..7] <8,9>
PCIE_CRX_GTX_P0
<15>
PCIE_CRX_GTX_N0
<15>
PCIE_CRX_GTX_P1
<15>
PCIE_CRX_GTX_N1
<15>
PCIE_CRX_GTX_P2
<15>
PCIE_CRX_GTX_N2
<15>
PCIE_CRX_GTX_P3
<15>
PCIE_CRX_GTX_N3
<15>
PCIE_CTX_GRX_P0 <15>
PCIE_CTX_GRX_N0 <15>
PCIE_CTX_GRX_P1 <15>
PCIE_CTX_GRX_N1 <15>
PCIE_CTX_GRX_P2 <15>
PCIE_CTX_GRX_N2 <15>
PCIE_CTX_GRX_P3 <15>
PCIE_CTX_GRX_N3 <15>
+1.5V_APU
+1.5V_APU
+1.05VS
+1.5V_APU
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
FT1 DDRIII/UMI/PCIE
Custom
6 48
Wednesday, November 30, 2011
2010/06/30 2012/0630 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
FT1 DDRIII/UMI/PCIE
Custom
6 48
Wednesday, November 30, 2011
2010/06/30 2012/0630 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
FT1 DDRIII/UMI/PCIE
Custom
6 48
Wednesday, November 30, 2011
2010/06/30 2012/0630
Compal Electronics, Inc.
Place within 1000 mils to APU
20100526
Less than 1"
Less than 1"
C519 0.1U_0402_16V7K
C519 0.1U_0402_16V7K
1 2
UMI
I/F
PCIE
I/F
U22A
S IC E SERIES EME450GBB22GVA 1.65G BGA
UMI
I/F
PCIE
I/F
U22A
S IC E SERIES EME450GBB22GVA 1.65G BGA
P_UMI_RXN3
AB7
P_UMI_RXP3
AC7
P_UMI_RXN2
AC10
P_UMI_RXP2
AB10
P_UMI_RXN1
Y10
P_UMI_RXP1
AA10
P_UMI_RXN0
Y12
P_UMI_RXP0
AA12
P_ZVDD_10
Y14
P_GPP_RXN3
Y3
P_GPP_RXP3
Y4
P_GPP_RXN2
AA2
P_GPP_RXP2
AA1
P_GPP_RXN1
AC4
P_GPP_RXP1
AB4
P_GPP_RXN0
Y6
P_GPP_RXP0
AA6
P_UMI_TXN3
AC8
P_UMI_TXP3
AB8
P_UMI_TXN2
Y8
P_UMI_TXP2
AA8
P_UMI_TXN1
AB11
P_UMI_TXP1
AC11
P_UMI_TXN0
AC12
P_UMI_TXP0
AB12
P_ZVSS
AA14
P_GPP_TXN3
V4
P_GPP_TXP3
V3
P_GPP_TXN2
Y2
P_GPP_TXP2
Y1
P_GPP_TXN1
AC3
P_GPP_TXP1
AB3
P_GPP_TXN0
AC6
P_GPP_TXP0
AB6
C529 0.1U_0402_16V7K
C529 0.1U_0402_16V7K
1 2
C522 0.1U_0402_16V7K
C522 0.1U_0402_16V7K
1 2
R437
39.2_0402_1%
R437
39.2_0402_1%
1
2
C526 0.1U_0402_16V7K
C526 0.1U_0402_16V7K
1 2
C531 0.1U_0402_16V7K
C531 0.1U_0402_16V7K
1 2
C528 0.1U_0402_16V7K
C528 0.1U_0402_16V7K
1 2
R436 1.27K_0402_1%
R436 1.27K_0402_1%
1 2
C534
1000P_0402_50V7K
C534
1000P_0402_50V7K
1
2
C533 0.1U_0402_16V7K
C533 0.1U_0402_16V7K
1 2
C518 0.1U_0402_16V7K
C518 0.1U_0402_16V7K
1 2
C520 0.1U_0402_16V7K
C520 0.1U_0402_16V7K
1 2
DDR
SYSTEM
MEMORY
U22E
S IC E SERIES EME450GBB22GVA 1.65G BGA
DDR
SYSTEM
MEMORY
U22E
S IC E SERIES EME450GBB22GVA 1.65G BGA
M_WE_L
V17
M_CAS_L
V19
M1_CS_L1
V16
M1_CS_L0
U17
M0_CS_L1
W16
M0_CS_L0
T17
M1_ODT1
W15
M1_ODT0
U19
M0_ODT1
V15
M0_ODT0
W19
M_CKE1
E15
M_CKE0
F15
M_EVENT_L
N17
M_RESET_L
L23
M_CLK_H3
L18
M_CLK_L2
N19
M_CLK_H2
N18
M_CLK_L1
M18
M_CLK_H1
M19
M_CLK_L0
M16
M_CLK_H0
M17
M_DQS_L7
AC16
M_DQS_L6
AC21
M_DQS_H6
AC20
M_DQS_L5
V22
M_DQS_H5
W22
M_DQS_L4
P22
M_DQS_H4
R22
M_DQS_L3
J23
M_DQS_H3
J22
M_DQS_L2
E22
M_DQS_H2
E23
M_DQS_L1
A20
M_DQS_H1
B20
M_DQS_L0
B16
M_DQS_H0
A16
M_DM7
AA16
M_DM6
AB20
M_DM5
V23
M_DM4
P23
M_DM3
H22
M_DM2
D21
M_DM1
B19
M_DM0
D15
M_BANK2
F16
M_BANK1
T18
M_BANK0
R18
M_ADD15
G15
M_ADD14
E16
M_ADD13
W17
M_ADD12
E18
M_ADD11
F17
M_ADD10
T19
M_ADD9
E19
M_ADD8
F19
M_ADD7
G18
M_ADD6
H15
M_ADD5
G17
M_ADD4
H17
M_ADD3
H18
M_ADD2
J17
M_ADD1
H19
M_ADD0
R17
M_ZVDDIO_MEM_S
M22
M_VREF
M23
M_DATA63
AC15
M_DATA62
AB15
M_DATA61
AB18
M_DATA60
AC18
M_DATA59
AC14
M_DATA58
AB14
M_DATA57
Y16
M_DATA56
AC17
M_DATA55
Y18
M_DATA54
AB19
M_DATA53
AA20
M_DATA52
AA23
M_DATA51
AA18
M_DATA50
AC19
M_DATA49
AB22
M_DATA48
Y20
M_DATA47
Y21
M_DATA46
W23
M_DATA45
U23
M_DATA44
T21
M_DATA43
Y22
M_DATA42
Y23
M_DATA41
V21
M_DATA40
V20
M_DATA39
T22
M_DATA38
R23
M_DATA37
P20
M_DATA36
M20
M_DATA35
T23
M_DATA34
T20
M_DATA33
P21
M_DATA32
N23
M_DATA31
K23
M_DATA30
K20
M_DATA29
H20
M_DATA28
G23
M_DATA27
K21
M_DATA26
K22
M_DATA25
H23
M_DATA24
H21
M_DATA23
F21
M_DATA22
F20
M_DATA21
D22
M_DATA20
C22
M_DATA19
F22
M_DATA18
F23
M_DATA17
D23
M_DATA16
C23
M_DATA15
C20
M_DATA14
A21
M_DATA13
B18
M_DATA12
A18
M_DATA11
D20
M_DATA10
B21
M_DATA9
A19
M_DATA8
C18
M_DATA7
D16
M_DATA6
C16
M_DATA5
C14
M_DATA4
A14
M_DATA3
D18
M_DATA2
A17
M_DATA1
A15
M_DATA0
B14
M_CLK_L3
L17
M_DQS_H7
AB16
M_RAS_L
U18
C525 0.1U_0402_16V7K
C525 0.1U_0402_16V7K
1 2
R438
1K_0402_1%
R438
1K_0402_1%
1
2
R435 2K_0402_1%
R435 2K_0402_1%
1 2
C532 0.1U_0402_16V7K
C532 0.1U_0402_16V7K
1 2
C527 0.1U_0402_16V7K
C527 0.1U_0402_16V7K
1 2
R444
1K_0402_5%
R444
1K_0402_5%
1 2
R439
1K_0402_1%
R439
1K_0402_1%
1
2
C521 0.1U_0402_16V7K
C521 0.1U_0402_16V7K
1 2
C524 0.1U_0402_16V7K
C524 0.1U_0402_16V7K
1 2
C535
0.1U_0402_16V4Z
C535
0.1U_0402_16V4Z
1
2
C530 0.1U_0402_16V7K
C530 0.1U_0402_16V7K
1 2
C523 0.1U_0402_16V7K
C523 0.1U_0402_16V7K
1 2
WWW.AliSaler.Com

7. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDD_18
+VDD_10
+VDDL_10
+VDD_18_DAC
+APU_CORE
+APU_CORE_NB
+1.5V_APU
+1.8VS
+1.8VS
+1.05VS
+3VS
+APU_CORE
+APU_CORE_NB
+1.5V_APU
+1.5V_APU
+1.5V_APU
+1.5V_APU +1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
P07-FT1 PWR/VSS
C
7 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
P07-FT1 PWR/VSS
C
7 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
P07-FT1 PWR/VSS
C
7 48
Tuesday, November 29, 2011
2010/06/30 2012/06/30
By case (Along split)
Near CPU Socket
POWER
Compal Electronics, Inc.
Change from SM010014520 to SD002000080
20100816
Change from SM010014520 to SD002000080
20100816
Change from SM010014520 to SD002000080
20100816
+1.0VS has been raised to +1.05VS for
AMD design guide 45339_R1.02 update 20101004
11A 2A
10A
0.15A
0.2A
5.5A
0.5A
2A
place C564
close APU ball
C580
0.1U_0402_16V7K
C580
0.1U_0402_16V7K
1
2
CPU
CORE
GPU
AND
NB
CORE
DDR3
TSense/PLL/DP/PCIE/IO
DIS
PLL
PCIE/IO/DDR3
Phy
DAC
DP
Phy/IO
POWER
U22C
S IC E SERIES EME450GBB22GVA 1.65G BGA
CPU
CORE
GPU
AND
NB
CORE
DDR3
TSense/PLL/DP/PCIE/IO
DIS
PLL
PCIE/IO/DDR3
Phy
DAC
DP
Phy/IO
POWER
U22C
S IC E SERIES EME450GBB22GVA 1.65G BGA
VDDIO_MEM_S_11
U16
VDDIO_MEM_S_10
W18
VDDIO_MEM_S_9
R19
VDDIO_MEM_S_8
R16
VDDIO_MEM_S_7
N16
VDDIO_MEM_S_6
L19
VDDIO_MEM_S_5
L16
VDDIO_MEM_S_4
J16
VDDIO_MEM_S_3
E17
VDDIO_MEM_S_2
G19
VDDIO_MEM_S_1
G16
VDDCR_NB_22
P13
VDDCR_NB_21
P11
VDDCR_NB_20
N14
VDDCR_NB_19
N12
VDDCR_NB_18
N10
VDDCR_NB_17
M13
VDDCR_NB_16
M12
VDDCR_NB_15
M11
VDDCR_NB_14
L14
VDDCR_NB_13
L12
VDDCR_NB_12
L10
VDDCR_NB_11
K13
VDDCR_NB_10
K11
VDDCR_NB_9
H12
VDDCR_NB_8
H9
VDDCR_NB_7
G13
VDDCR_NB_6
G11
VDDCR_NB_5
F12
VDDCR_NB_4
F9
VDDCR_NB_3
E13
VDDCR_NB_2
E11
VDDCR_NB_1
E8
VDDCR_CPU_15
R8
VDDCR_CPU_14
N7
VDDCR_CPU_13
M8
VDDCR_CPU_12
M6
VDDCR_CPU_11
L7
VDDCR_CPU_10
J8
VDDCR_CPU_9
J6
VDDCR_CPU_8
H7
VDDCR_CPU_7
H5
VDDCR_CPU_6
G8
VDDCR_CPU_5
G6
VDDCR_CPU_4
F7
VDDCR_CPU_3
F5
VDDCR_CPU_2
E6
VDDCR_CPU_1
E5
VDD_33
A4
VDD_10_4
T12
VDD_10_3
V12
VDD_10_2
W13
VDD_10_1
U13
VDDPL_10
U11
VDD_18_DAC
W9
VDD_18_7
V7
VDD_18_6
T7
VDD_18_5
W6
VDD_18_4
U9
VDD_18_3
U6
VDD_18_2
W8
VDD_18_1
U8
C546
1U_0402_6.3V6K
C546
1U_0402_6.3V6K
1
2
C537
0.1U_0402_16V7K
C537
0.1U_0402_16V7K
1
2
C571
1U_0402_6.3V6K
C571
1U_0402_6.3V6K
1
2
C603
180P_0402_50V8J
C603
180P_0402_50V8J
1
2
L30
FBMA-L11-201209-221LMA30T_0805
L30
FBMA-L11-201209-221LMA30T_0805
1
2
C562
0.1U_0402_16V7K
C562
0.1U_0402_16V7K
1
2
C591
0.1U_0402_16V7K
C591
0.1U_0402_16V7K
1
2
C585
1U_0402_6.3V6K
C585
1U_0402_6.3V6K
1
2
C592
0.1U_0402_16V7K
C592
0.1U_0402_16V7K
1
2
C561
0.1U_0402_16V7K
C561
0.1U_0402_16V7K
1
2
C599
0.1U_0402_16V7K
C599
0.1U_0402_16V7K
1
2
C563
0.1U_0402_16V7K
C563
0.1U_0402_16V7K
1
2
C610
0.1U_0402_16V7K
C610
0.1U_0402_16V7K
1
2
C548
1U_0402_6.3V6K
C548
1U_0402_6.3V6K
1
2
C574
10U_0603_6.3V6M
C574
10U_0603_6.3V6M
1
2
C598
1U_0402_6.3V6K
C598
1U_0402_6.3V6K
1
2
C570
0.1U_0402_16V7K
C570
0.1U_0402_16V7K
1
2
L29
FBMA-L11-201209-221LMA30T_0805
L29
FBMA-L11-201209-221LMA30T_0805
1
2
C554
180P_0402_50V8J
C554
180P_0402_50V8J
1
2
L32
FBMA-L11-201209-221LMA30T_0805
L32
FBMA-L11-201209-221LMA30T_0805
1
2
C547
1U_0402_6.3V6K
C547
1U_0402_6.3V6K
1
2
C572
1U_0402_6.3V6K
C572
1U_0402_6.3V6K
1
2
C586
1U_0402_6.3V6K
C586
1U_0402_6.3V6K
1
2
C608
0.1U_0402_16V7K
C608
0.1U_0402_16V7K
1
2
C583
1U_0402_6.3V6K
C583
1U_0402_6.3V6K
1
2
C612
180P_0402_50V8J
C612
180P_0402_50V8J
1
2
C565
0.1U_0402_16V7K
C565
0.1U_0402_16V7K
1
2
C573
10U_0603_6.3V6M
C573
10U_0603_6.3V6M
1
2
C557
1U_0402_6.3V6K
C557
1U_0402_6.3V6K
1
2
C564
180P_0402_50V8J
C564
180P_0402_50V8J
1
2
C600
0.1U_0402_16V7K
C600
0.1U_0402_16V7K
1
2
C569
0.1U_0402_16V7K
C569
0.1U_0402_16V7K
1
2
C551
1U_0402_6.3V6K
C551
1U_0402_6.3V6K
1
2
C538
1U_0402_6.3V6K
C538
1U_0402_6.3V6K
1
2
C597
1U_0402_6.3V6K
C597
1U_0402_6.3V6K
1
2
C588
180P_0402_50V8J
C588
180P_0402_50V8J
1
2
C581
1U_0402_6.3V6K
C581
1U_0402_6.3V6K
1
2
C553
1U_0402_6.3V6K
C553
1U_0402_6.3V6K
1
2
C595
1U_0402_6.3V6K
C595
1U_0402_6.3V6K
1
2
C594
0.1U_0402_16V7K
C594
0.1U_0402_16V7K
1
2
C545
180P_0402_50V8J
C545
180P_0402_50V8J
1
2
C556
180P_0402_50V8J
C556
180P_0402_50V8J
1
2
C602
180P_0402_50V8J
C602
180P_0402_50V8J
1
2
C596
1U_0402_6.3V6K
C596
1U_0402_6.3V6K
1
2
C613
180P_0402_50V8J
C613
180P_0402_50V8J
1
2
C560
0.1U_0402_16V7K
C560
0.1U_0402_16V7K
1
2
C555
180P_0402_50V8J
C555
180P_0402_50V8J
1
2
C558
10U_0603_6.3V6M
C558
10U_0603_6.3V6M
1
2
C587
180P_0402_50V8J
C587
180P_0402_50V8J
1
2
C609
0.1U_0402_16V7K
C609
0.1U_0402_16V7K
1
2
C549
10U_0603_6.3V6M
C549
10U_0603_6.3V6M
1
2
L31
FBMA-L11-201209-221LMA30T_0805
L31
FBMA-L11-201209-221LMA30T_0805
1
2
C601
0.1U_0402_16V7K
C601
0.1U_0402_16V7K
1
2
+
C622
330U_2.5V_M
@
+
C622
330U_2.5V_M
@
1
2
C584
1U_0402_6.3V6K
C584
1U_0402_6.3V6K
1
2
C611
0.1U_0402_16V7K
C611
0.1U_0402_16V7K
1
2
C593
0.1U_0402_16V7K
C593
0.1U_0402_16V7K
1
2
C550
1U_0402_6.3V6K
C550
1U_0402_6.3V6K
1
2
GND
U22D
S IC E SERIES EME450GBB22GVA 1.65G BGA
GND
U22D
S IC E SERIES EME450GBB22GVA 1.65G BGA
VSS_49
N11
VSS_48
N8
VSS_47
N6
VSS_46
N4
VSS_45
M7
VSS_44
L22
VSS_43
L20
VSS_42
L13
VSS_41
L11
VSS_40
L8
VSS_39
L6
VSS_38
L4
VSS_37
K14
VSS_36
K10
VSS_35
J20
VSS_34
J7
VSS_33
J5
VSS_32
J4
VSS_31
H13
VSS_30
H11
VSS_29
H6
VSS_28
G22
VSS_27
G20
VSS_26
G12
VSS_25
G9
VSS_24
G7
VSS_23
G5
VSS_22
G4
VSS_21
F13
VSS_20
F11
VSS_19
F8
VSS_18
E20
VSS_17
E12
VSS_16
E9
VSS_15
E7
VSS_14
D19
VSS_13
D17
VSS_12
B15
VSS_11
D14
VSS_10
D11
VSS_9
D9
VSS_8
D7
VSS_7
D5
VSS_6
C4
VSS_5
B22
VSS_4
B17
VSS_3
B11
VSS_2
B7
VSS_1
A7
VSSBG_DAC
A11
VSS_97
AC13
VSS_96
AC9
VSS_95
AC5
VSS_94
AB21
VSS_93
AB17
VSS_92
AB13
VSS_91
AB9
VSS_90
AB5
VSS_89
AB2
VSS_88
AA22
VSS_87
AA4
VSS_86
Y19
VSS_85
Y17
VSS_84
Y15
VSS_83
Y13
VSS_82
Y11
VSS_81
Y9
VSS_80
Y7
VSS_79
Y5
VSS_78
W20
VSS_77
W12
VSS_76
W7
VSS_75
W5
VSS_74
W4
VSS_73
W2
VSS_72
W1
VSS_71
V13
VSS_70
V11
VSS_69
V9
VSS_68
V8
VSS_67
U22
VSS_66
U20
VSS_65
U12
VSS_64
U7
VSS_63
U5
VSS_62
U4
VSS_61
T13
VSS_60
T11
VSS_59
T9
VSS_58
T6
VSS_57
R20
VSS_56
R7
VSS_55
R4
VSS_54
P14
VSS_53
P10
VSS_52
N22
VSS_51
N20
VSS_50
N13
C590
10U_0603_6.3V6M
C590
10U_0603_6.3V6M
1
2
C615
180P_0402_50V8J
C615
180P_0402_50V8J
1
2
J15
JUMP_43X79
@ J15
JUMP_43X79
@
1
1
2
2
C566
1U_0402_6.3V6K
C566
1U_0402_6.3V6K
1
2
C623
22U_0805_6.3V6M
@
C623
22U_0805_6.3V6M
@
1
2
C1102
180P_0402_50V8J
C1102
180P_0402_50V8J
1
2
C589
10U_0603_6.3V6M
C589
10U_0603_6.3V6M
1
2
C559
0.1U_0402_16V7K
C559
0.1U_0402_16V7K
1
2
C552
1U_0402_6.3V6K
C552
1U_0402_6.3V6K
1
2
C582
1U_0402_6.3V6K
C582
1U_0402_6.3V6K
1
2
C614
180P_0402_50V8J
C614
180P_0402_50V8J
1
2
C567
10U_0603_6.3V6M
C567
10U_0603_6.3V6M
1
2
WWW.AliSaler.Com

8. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_D26
DDR_A_D2
DDR_A_D25
DDR_A_D27
DDR_A_D0
DDR_A_DM0
DDR_A_D19
DDR_A_D10
DDR_A_D3
DDR_A_D1
DDR_A_D16
DDR_A_DM3
DDR_A_D9
DDR_A_D24
DDR_A_D18
DDR_A_D11
DDR_A_D8
DDR_A_D17
DDR_A_MA12
DDR_A_MA3
DDR_A_MA8
DDR_A_MA10
DDR_A_MA9
DDR_A_MA1
DDR_A_MA5
DDR_A_MA13
DDR_A_D35
DDR_A_D42
DDR_A_D59
DDR_A_D57
DDR_A_D51
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_D40
DDR_A_D49
DDR_A_DM7
DDR_A_D56
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_D32
DDR_A_D50
DDR_A_D41
DDR_A_D5
DDR_A_D22
DDR_A_D14
DDR_A_D31
DDR_A_D12
DDR_A_D6
DDR_A_DM2
DDR_A_DM1
DDR_A_D28
DDR_A_D4
DDR_A_D30
DDR_A_D29
DDR_A_D7
DDR_A_D13
DDR_A_D20
DDR_A_D21
DDR_A_D15
DDR_A_D23
DDR_A_MA15
DDR_A_MA7
DDR_A_MA0
DDR_A_MA6
DDR_A_MA14
DDR_A_MA4
DDR_A_MA11
DDR_A_MA2
DDR_A_D36
DDR_A_D63
DDR_A_DM6
DDR_A_D39
DDR_A_D46
DDR_A_DM4
DDR_A_D44
DDR_A_D52
DDR_A_D54
DDR_A_D45
DDR_A_D60
DDR_A_D37
DDR_A_D55
DDR_A_D62
DDR_A_D53
DDR_A_D47
DDR_A_D38
DDR_A_D61
DDR_A_MA[0..15] <6,9>
DDR_A_D[0..63] <6,9>
DDR_A_DM[0..7] <6,9>
DDR_A_DQS#1
<6,9>
DDR_A_DQS1
<6,9>
DDR_A_DQS#2
<6,9>
DDR_A_DQS2
<6,9>
DDR_CKE0
<6,9>
DDR_CS1_DIMMA#
<6>
DDR_A_WE#
<6,9>
DDR_A_BS2
<6,9>
DDR_A_BS0
<6,9>
DDR_A_CAS#
<6,9>
DDR_A_CLK0
<6>
DDR_A_CLK#0
<6>
DDR_A_DQS#4
<6,9>
DDR_A_DQS4
<6,9>
DDR_A_DQS#6
<6,9>
DDR_A_DQS6
<6,9>
DDR_RST# <6,9>
DDR_A_DQS3 <6,9>
DDR_A_DQS0 <6,9>
DDR_A_DQS#3 <6,9>
DDR_A_DQS#0 <6,9>
DDR_A_BS1 <6,9>
DDR_A_RAS# <6,9>
DDR_CS0_DIMMA# <6>
DDR_A_ODT0 <6>
DDR_A_ODT1 <6>
DDR_A_CLK#1 <6>
DDR_A_CLK1 <6>
DDR_CKE1 <6,9>
DDR_EVENT# <6,9>
FCH_SMDAT0 <9,12,29>
FCH_SMCLK0 <9,12,29>
DDR_A_DQS5 <6,9>
DDR_A_DQS#5 <6,9>
DDR_A_DQS7 <6,9>
DDR_A_DQS#7 <6,9>
+VREF_DQ
+1.5V
+VREF_CA
+1.5V
+0.75VS
+1.5V
+1.5V
+VREF_DQ
+1.5V
+3VS
+1.5V
+VREF_CA
+0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
DDR3 SODIMM-I Socket
Custom
8 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
DDR3 SODIMM-I Socket
Custom
8 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
DDR3 SODIMM-I Socket
Custom
8 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30
Place near JDIMM1
CRB 0.1u X1 4.7u X1 CRB 100U X2
Combine to one?
DDR3 SO-DIMM A
Reverse Type
Compal Electronics, Inc.
20100729
SF000002Y00
R441
1K_0402_1%
R441
1K_0402_1%
1
2
C647
0.1U_0402_16V4Z
C647
0.1U_0402_16V4Z
1
2
C631
0.1U_0402_16V4Z
C631
0.1U_0402_16V4Z
1
2
C632
0.1U_0402_16V4Z
C632
0.1U_0402_16V4Z
1
2
C644
0.1U_0402_16V4Z
C644
0.1U_0402_16V4Z
1
2
C627
1000P_0402_50V7K
C627
1000P_0402_50V7K
1
2
C642
4.7U_0603_6.3V6K
C642
4.7U_0603_6.3V6K
1
2
R446
10K_0402_5%
R446
10K_0402_5%
1
2
R443
1K_0402_1%
R443
1K_0402_1%
1
2
C628
0.1U_0402_16V4Z
C628
0.1U_0402_16V4Z
1
2
C645
1000P_0402_50V7K
C645
1000P_0402_50V7K
1
2
C646
2.2U_0603_6.3V4Z
C646
2.2U_0603_6.3V4Z
1
2
+
C643
220U_6.3V_M
+
C643
220U_6.3V_M
1
2
C626
0.1U_0402_16V4Z
C626
0.1U_0402_16V4Z
1
2
C641
0.1U_0402_16V4Z
C641
0.1U_0402_16V4Z
1
2
R440
1K_0402_1%
R440
1K_0402_1%
1
2
R445 10K_0402_5%
R445 10K_0402_5%
1 2
JDIMM1
LCN_DAN06-K4406-0103
ME@
JDIMM1
LCN_DAN06-K4406-0103
ME@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7
18
VSS
20
DQ12
22
DQ13
24
VSS
26
DM1
28
RESET#
30
VSS
32
DQ14
34
DQ15
36
VSS
38
DQ20
40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21
42
VSS
44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0
98
VDD
100
CK1
102
CK1#
104
VDD
106
BA1
108
RAS#
110
VDD
112
S0#
114
ODT0
116
VDD
118
ODT1
120
NC
122
VDD
124
VREF_CA
126
VSS
128
DQ36
130
DQ37
132
VSS
134
DM4
136
VSS
138
DQ38
140
DQ39
142
VSS
144
DQ44
146
DQ45
148
VSS
150
DQS5#
152
DQS5
154
VSS
156
DQ46
158
DQ47
160
VSS
162
DQ52
164
DQ53
166
VSS
168
DM6
170
VSS
172
DQ54
174
DQ55
176
VSS
178
DQ60
180
DQ61
182
VSS
184
DQS7#
186
DQS7
188
VSS
190
DQ62
192
DQ63
194
VSS
196
EVENT#
198
SDA
200
SA1
201
VTT
203
GND1
205
SCL
202
VTT
204
GND2
206
BOSS1
207 BOSS2 208
C629
0.1U_0402_16V4Z
C629
0.1U_0402_16V4Z
1
2
C633
0.1U_0402_16V4Z
C633
0.1U_0402_16V4Z
1
2
R442
1K_0402_1%
R442
1K_0402_1%
1
2
C630
0.1U_0402_16V4Z
C630
0.1U_0402_16V4Z
1
2
WWW.AliSaler.Com

9. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D36
DDR_A_D63
DDR_A_D26
DDR_A_D2
DDR_A_D5
DDR_A_D22
DDR_A_D25
DDR_A_D35
DDR_A_MA12
DDR_A_D14
DDR_A_DM6
DDR_A_D42
DDR_A_D27
DDR_A_MA15
DDR_A_D31
DDR_A_D12
DDR_A_D59
DDR_A_MA3
DDR_A_D6
DDR_A_D39
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_D57
DDR_A_D46
DDR_A_D0
DDR_A_D28
DDR_A_DM0
DDR_A_D51
DDR_A_D19
DDR_A_DM4
DDR_A_D4
DDR_A_D30
DDR_A_D44
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_MA8
DDR_A_D10
DDR_A_MA6
DDR_A_MA10
DDR_A_D3
DDR_A_D1
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_D29
DDR_A_D52
DDR_A_DM3
DDR_A_D54
DDR_A_D49
DDR_A_D45
DDR_A_D9
DDR_A_DM7
DDR_A_MA1
DDR_A_D7
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_D37
DDR_A_MA5
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D24
DDR_A_D15
DDR_A_D56
DDR_A_D23
DDR_A_D53
DDR_A_D47
DDR_A_D18
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_D11
DDR_A_D38
DDR_A_D32
DDR_A_MA13
DDR_A_MA11
DDR_A_D50
DDR_A_D8
DDR_A_D61
DDR_A_MA2
DDR_A_D41
DDR_A_D17
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_CKE0
<6,8>
DDR_CS1_DIMMB#
<6>
DDR_A_BS1 <6,8>
DDR_A_WE#
<6,8>
DDR_A_RAS# <6,8>
DDR_CS0_DIMMB# <6>
DDR_RST# <6,8>
DDR_A_BS2
<6,8>
DDR_A_BS0
<6,8>
DDR_A_CAS#
<6,8> DDR_B_ODT0 <6>
DDR_B_ODT1 <6>
DDR_B_CLK#3 <6>
DDR_B_CLK3 <6>
DDR_B_CLK2
<6>
DDR_B_CLK#2
<6>
DDR_CKE1 <6,8>
DDR_A_DQS3 <6,8>
DDR_A_DQS0 <6,8>
DDR_A_DQS#3 <6,8>
DDR_A_DQS#0 <6,8>
DDR_A_DQS5 <6,8>
DDR_A_DQS#5 <6,8>
DDR_A_DQS7 <6,8>
DDR_A_DQS#7 <6,8>
DDR_A_DQS#1
<6,8>
DDR_A_DQS1
<6,8>
DDR_A_DQS#2
<6,8>
DDR_A_DQS2
<6,8>
DDR_A_DQS#4
<6,8>
DDR_A_DQS4
<6,8>
DDR_A_DQS#6
<6,8>
DDR_A_DQS6
<6,8>
DDR_EVENT# <6,8>
DDR_A_MA[0..15] <6,8>
DDR_A_D[0..63] <6,8>
DDR_A_DM[0..7] <6,8>
FCH_SMDAT0 <8,12,29>
FCH_SMCLK0 <8,12,29>
+0.75VS
+VREF_CA
+1.5V
+VREF_DQ
+0.75VS
+1.5V
+3VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
DDR3 SODIMM-II Socket
Custom
9 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
DDR3 SODIMM-II Socket
Custom
9 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 1.0
DDR3 SODIMM-II Socket
Custom
9 48
Wednesday, November 30, 2011
2010/06/30 2012/06/30
Place near JDIMM2
CRB 0.1u X1 4,7uX1
CRB only one 4.7k
DDR3 SO-DIMM B
Reverse Type
Compal Electronics, Inc.
For DRAM strap pin reservation
20100817
For DRAM strap pin reservation
20100817
JDIMM2
LCN_DAN06-K4806-0103
ME@
JDIMM2
LCN_DAN06-K4806-0103
ME@
VREF_DQ
1 VSS1 2
VSS2
3 DQ4 4
DQ0
5 DQ5 6
DQ1
7 VSS3 8
VSS4
9 DQS#0 10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89
A6
90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT#
198
VDDSPD
199
SDA
200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C649
1000P_0402_50V7K
DIMM@
C649
1000P_0402_50V7K
DIMM@
1
2
C651
0.1U_0402_16V4Z
DIMM@
C651
0.1U_0402_16V4Z
DIMM@
1
2
C664
4.7U_0603_6.3V6K
DIMM@
C664
4.7U_0603_6.3V6K
DIMM@
1
2
C663
0.1U_0402_16V4Z
DIMM@
C663
0.1U_0402_16V4Z
DIMM@
1
2
C655
0.1U_0402_16V4Z
DIMM@
C655
0.1U_0402_16V4Z
DIMM@
1
2
C654
0.1U_0402_16V4Z
DIMM@
C654
0.1U_0402_16V4Z
DIMM@
1
2
C666
1000P_0402_50V7K DIMM@
C666
1000P_0402_50V7K DIMM@
1
2
C648
0.1U_0402_16V4Z
DIMM@ C648
0.1U_0402_16V4Z
DIMM@
1
2
C667
2.2U_0603_6.3V4Z
DIMM@
C667
2.2U_0603_6.3V4Z
DIMM@
1
2
C653
0.1U_0402_16V4Z
DIMM@
C653
0.1U_0402_16V4Z
DIMM@
1
2
C652
0.1U_0402_16V4Z
DIMM@
C652
0.1U_0402_16V4Z
DIMM@
1
2
C668
0.1U_0402_16V4Z
DIMM@
C668
0.1U_0402_16V4Z
DIMM@
1
2
R961 10K_0402_5%
DIMM@
R961 10K_0402_5%
DIMM@
1 2
C665
0.1U_0402_16V4Z
DIMM@
C665
0.1U_0402_16V4Z
DIMM@
1
2
C650
0.1U_0402_16V4Z
DIMM@
C650
0.1U_0402_16V4Z
DIMM@
1
2
R962
10K_0402_5%
DIMM@
R962
10K_0402_5%
DIMM@
1
2
WWW.AliSaler.Com

10. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
A_RST#
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
PCIE_CALRP
PCIE_CALRN
CLK_CALRN
CLK_PCIE_VGA_R
CLK_PCIE_VGA#_R
25M_X2
APU_PROCHOT#_R
32K_X2
32K_X1
APU_PCIE_RST#_C
PLT_RST#
CLK_PCIE_WLAN#_R
CLK_PCIE_WLAN_R
CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R
APU_PCIE_RST#_C
25M_X2
25M_X1
25M_X1
32K_X1
32K_X2
PCIE_FTX_DRX_P1
PCIE_FTX_DRX_N1
PCIE_FTX_DRX_P0
PCIE_FTX_DRX_N0
UMI_TX0P
<6>
UMI_TX0N
<6>
UMI_TX1P
<6>
UMI_TX1N
<6>
UMI_TX2P
<6>
UMI_TX2N
<6>
UMI_TX3P
<6>
UMI_TX3N
<6>
UMI_RX0P
<6>
UMI_RX0N
<6>
UMI_RX1P
<6>
UMI_RX1N
<6>
UMI_RX2P
<6>
UMI_RX2N
<6>
UMI_RX3P
<6>
UMI_RX3N
<6>
CLK_PCIE_VGA#
<15>
CLK_PCIE_VGA
<15>
APU_DISP_CLK
<5>
APU_DISP_CLK#
<5>
APU_CLK
<5>
APU_CLK#
<5>
PCI_CLK4 <14>
PCI_CLK3 <14>
PCI_CLK1 <14>
PCI_AD27 <14>
PCI_AD26 <14>
PCI_AD25 <14>
PCI_AD24 <14>
PCI_AD23 <14>
ALLOW_STOP# <5>
APU_RST# <5>
H_PROCHOT# <5,30,37>
APU_PWRGD <5,44>
LPC_CLK1 <14>
RTC_CLK <14,30>
LPC_AD0 <29,30>
LPC_AD1 <29,30>
LPC_AD2 <29,30>
LPC_AD3 <29,30>
SERIRQ <30>
LPC_FRAME# <29,30>
CLK_PCI_EC <14,30>
CLK_PCI_DB <29>
CLK_PCIE_WLAN
<29>
CLK_PCIE_WLAN#
<29>
CLK_PCIE_LAN
<25>
CLK_PCIE_LAN#
<25>
APU_PCIE_RST# <15,29>
PLT_RST# <25,30>
PCIE_FTX_C_DRX_P0
<25>
PCIE_FTX_C_DRX_N0
<25>
PCIE_FTX_C_DRX_N1
<29>
PCIE_FTX_C_DRX_P1
<29>
PCIE_FRX_DTX_P0
<25>
PCIE_FRX_DTX_N0
<25>
PCIE_FRX_DTX_P1
<29>
PCIE_FRX_DTX_N1
<29>
+VDDAN_11_PCIE
+1.1VS_CKVDD
+RTCBATT
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH PCIE/CLK/PCI/LPC/RTC
Custom
10 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH PCIE/CLK/PCI/LPC/RTC
Custom
10 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH PCIE/CLK/PCI/LPC/RTC
Custom
10 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
W=20mils
for Clear CMOS
C146 place close to FCH
WLAN
LAN
Module design have reserve GPIO44,45 for
VGA power enable and reset
R692/ C790 close to FCH
APU_PCIE_RST #: Reset PCIE device on APU
LAN
WLAN
change to 510 Ohm
VGA
R106 1M_0402_5%
R106 1M_0402_5%
1 2
C148 0.1U_0402_16V7K
C148 0.1U_0402_16V7K
1 2
R558 22_0402_5%
R558 22_0402_5%
1 2
Y4
25MHZ_20PF_FSX3M-25.M20FDO
Y4
25MHZ_20PF_FSX3M-25.M20FDO
NC 4
OSC 1
OSC
3
NC
2 R107
20M_0402_5%
R107
20M_0402_5%
1
2
C154 0.1U_0402_16V7K
C154 0.1U_0402_16V7K
1 2
T101
T101
R100 0_0402_5%
R100 0_0402_5%
1 2
R15 0_0402_5%
@
R15 0_0402_5%
@
1 2
C151 0.1U_0402_16V7K
C151 0.1U_0402_16V7K
1 2
C159
22P_0402_50V8J
C159
22P_0402_50V8J
1 2
R101 0_0402_5%
R101 0_0402_5%
1 2
C158
22P_0402_50V8J
C158
22P_0402_50V8J
1 2
R692
33_0402_5%
@R692
33_0402_5%
@
1 2
CLRP1
SHORT PADS
@
CLRP1
SHORT PADS
@
1
2
R98 0_0402_5%
R98 0_0402_5%
1 2
C157
22P_0402_50V8J
C157
22P_0402_50V8J
1
2
Y1
32.768KHZ_12.5PF_CM31532768DZFT
Y1
32.768KHZ_12.5PF_CM31532768DZFT
1
2
R103 0_0402_5%
R103 0_0402_5%
1 2
C153 0.1U_0402_16V7K
C153 0.1U_0402_16V7K
1 2
C149 0.1U_0402_16V7K
C149 0.1U_0402_16V7K
1 2
R94 590_0402_1%
R94 590_0402_1%
1 2
R670
0_0402_5%
@
R670
0_0402_5%
@
1 2
R102 0_0402_5%
R102 0_0402_5%
1 2
C789
0.1U_0402_16V4Z
@
C789
0.1U_0402_16V4Z
@
1 2
T100
T100
C790
150P_0402_50V8J
@
C790
150P_0402_50V8J
@
1
2
T99
T99
R557 33_0402_5%
R557 33_0402_5%
1 2
R695
0_0402_5%
@R695
0_0402_5%
@
1 2
C718 0.1U_0402_16V7K
C718 0.1U_0402_16V7K
1 2
R99 0_0402_5%
R99 0_0402_5%
1 2
C156
1U_0402_6.3V6K
C156
1U_0402_6.3V6K
1
2
C150 0.1U_0402_16V7K
C150 0.1U_0402_16V7K
1 2
C719 0.1U_0402_16V7K
C719 0.1U_0402_16V7K
1 2
C147 0.1U_0402_16V7K
C147 0.1U_0402_16V7K
1 2
R559
22_0402_5%
@
R559
22_0402_5%
@
1 2
C720 0.1U_0402_16V7K
C720 0.1U_0402_16V7K
1 2
R866
0_0402_5%
R866
0_0402_5%
1
2
R105 510_0402_5%
R105 510_0402_5%
1 2
C152 0.1U_0402_16V7K
C152 0.1U_0402_16V7K
1 2
R95 2K_0402_1%
R95 2K_0402_1%
1 2
C721 0.1U_0402_16V7K
C721 0.1U_0402_16V7K
1 2
HUDSON-2
PCI
CLKS
PCI
EXPRESS
INTERFACES
PCI
INTERFACE
CLOCK
GENERATOR
LPC
APU
S5
PLUS
U2A
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
HUDSON-2
PCI
CLKS
PCI
EXPRESS
INTERFACES
PCI
INTERFACE
CLOCK
GENERATOR
LPC
APU
S5
PLUS
U2A
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
PCIE_RST#
AE2
A_RST#
AD5
UMI_TX0P
AE30
UMI_TX0N
AE32
UMI_TX1P
AD33
UMI_TX1N
AD31
UMI_TX2P
AD28
UMI_TX2N
AD29
UMI_TX3P
AC30
UMI_TX3N
AC32
UMI_RX0P
AB33
UMI_RX0N
AB31
UMI_RX1P
AB28
UMI_RX1N
AB29
UMI_RX2P
Y33
UMI_RX2N
Y31
UMI_RX3P
Y28
UMI_RX3N
Y29
PCIE_CALRP
AF29
PCIE_CALRN
AF31
GPP_TX0P
V33
GPP_TX0N
V31
GPP_TX1P
W30
GPP_TX1N
W32
GPP_TX2P
AB26
GPP_TX2N
AB27
GPP_TX3P
AA24
GPP_TX3N
AA23
GPP_RX0P
AA27
GPP_RX0N
AA26
GPP_RX1P
W27
GPP_RX1N
V27
GPP_RX2P
V26
GPP_RX2N
W26
GPP_RX3P
W24
GPP_RX3N
W23
CLK_CALRN
F27
PCIE_RCLKP
G30
PCIE_RCLKN
G28
DISP_CLKP
R26
DISP_CLKN
T26
DISP2_CLKP
H33
DISP2_CLKN
H31
APU_CLKP
T24
APU_CLKN
T23
SLT_GFX_CLKP
J30
SLT_GFX_CLKN
K29
GPP_CLK0P
H27
GPP_CLK0N
H28
GPP_CLK1P
J27
GPP_CLK1N
K26
GPP_CLK2P
F33
GPP_CLK2N
F31
GPP_CLK3P
E33
GPP_CLK3N
E31
GPP_CLK4P
M23
GPP_CLK4N
M24
GPP_CLK5P
M27
GPP_CLK5N
M26
GPP_CLK6P
N25
GPP_CLK6N
N26
GPP_CLK7P
R23
GPP_CLK7N
R24
GPP_CLK8P
N27
GPP_CLK8N
R27
14M_25M_48M_OSC
J26
25M_X1
C31
25M_X2
C33
PCICLK0 AF3
PCICLK1/GPO36 AF1
PCICLK2/GPO37 AF5
PCICLK3/GPO38 AG2
PCICLK4/14M_OSC/GPO39 AF6
PCIRST# AB5
AD0/GPIO0
AJ3
AD1/GPIO1
AL5
AD2/GPIO2
AG4
AD3/GPIO3
AL6
AD4/GPIO4
AH3
AD5/GPIO5
AJ5
AD6/GPIO6
AL1
AD7/GPIO7
AN5
AD8/GPIO8
AN6
AD9/GPIO9
AJ1
AD10/GPIO10
AL8
AD11/GPIO11
AL3
AD12/GPIO12
AM7
AD13/GPIO13 AJ6
AD14/GPIO14 AK7
AD15/GPIO15 AN8
AD16/GPIO16 AG9
AD17/GPIO17 AM11
AD18/GPIO18 AJ10
AD19/GPIO19 AL12
AD20/GPIO20 AK11
AD21/GPIO21 AN12
AD22/GPIO22 AG12
AD23/GPIO23 AE12
AD24/GPIO24 AC12
AD25/GPIO25 AE13
AD26/GPIO26 AF13
AD27/GPIO27 AH13
AD28/GPIO28 AH14
AD29/GPIO29 AD15
AD30/GPIO30 AC15
AD31/GPIO31 AE16
CBE0# AN3
CBE1# AJ8
CBE2# AN10
CBE3# AD12
FRAME# AG10
DEVSEL# AK9
IRDY# AL10
TRDY# AF10
PAR AE10
STOP#
AH1
PERR#
AM9
SERR#
AH8
REQ0#
AG15
REQ1#/GPIO40
AG13
REQ2#/CLK_REQ8#/GPIO41
AF15
REQ3#/CLK_REQ5#/GPIO42
AM17
GNT0#
AD16
GNT1#/GPO44
AD13
GNT2#/SD_LED/GPO45
AD21
GNT3#/CLK_REQ7#/GPIO46
AK17
CLKRUN#
AD19
LOCK#
AH9
INTE#/GPIO32
AF18
INTF#/GPIO33
AE18
INTG#/GPIO34
AC16
INTH#/GPIO35
AD18
LPCCLK0
B25
LPCCLK1
D25
LAD0
D27
LAD1
C28
LAD2
A26
LAD3
A29
LFRAME#
A31
LDRQ0#
B27
LDRQ1#/CLK_REQ6#/GPIO49
AE27
SERIRQ/GPIO48
AE19
DMA_ACTIVE#
G25
PROCHOT#
E28
APU_PG
E26
LDT_STP#
G26
APU_RST#
F26
S5_CORE_EN
H7
RTCCLK
F1
INTRUDER_ALERT#
F3
VDDBT_RTC_G
E6
32K_X1
G2
32K_X2
G4
R88 2K_0402_1%
R88 2K_0402_1%
1 2
R693
8.2K_0402_5%
@
R693
8.2K_0402_5%
@
1
2
T14
T14
C146 150P_0402_50V8J
C146 150P_0402_50V8J
1 2
U43
MC74VHC1G08DFT2G SC70 5P
@
U43
MC74VHC1G08DFT2G SC70 5P
@
B
2
A
1
Y
4
P
5
G
3
C155
22P_0402_50V8J
C155
22P_0402_50V8J
1
2
WWW.AliSaler.Com

11. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SATA_CALRP
SATA_CALRN
GBE_PHY_INTR
SPI_WP#_R
SPI_HOLD#
SPI_HOLD#
SPI_SI
SPI_CLK_FCH
SPI_CLK_FCH
SPI_CLK_FCH_R
SPI_SI_R
SPI_CLK_FCH_R
SPI_SI_R
SPI_SB_CS0#_R
SPI_SO_R
SPI_WP#
GBE_PHY_INTR
SPI_WP#_R
SPI_SB_CS0#
SPI_SO_R SPI_SO_L
SPI_SB_CS0#_R
SPI_WP#
SATA_FRX_C_DTX_N0
<28>
SATA_FRX_C_DTX_P0
<28>
SATA_FRX_C_DTX_N1
<28>
SATA_FRX_C_DTX_P1
<28>
WL_OFF#
<29>
ODD_EN
<28>
BT_ON#
<28>
SATA_FTX_C_DRX_P1
<28>
SATA_FTX_C_DRX_N1
<28>
BT_DISABLE#
<29>
SATA_FTX_C_DRX_P0
<28>
SATA_FTX_C_DRX_N0
<28>
+AVDD_SATA
+3VS
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH SATA/SPI/VGA/HWM/SD
Custom
11 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH SATA/SPI/VGA/HWM/SD
Custom
11 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH SATA/SPI/VGA/HWM/SD
Custom
11 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Need to enable internal
pull down to leave
unconnected
4MBSPIROM
&Non-shareROM.
HDD
ODD
R110 place close to FCH
FCH-M3LNCpin
FCH-M3LNCpin
R116
0_0402_5%
R116
0_0402_5%
1 2
U4
W25Q32BVSSIG SOIC 8
U4
W25Q32BVSSIG SOIC 8
CS#
1
SO/SIO1
2
WP#
3
GND
4
VCC
8
HOLD#
7
SCLK
6
SI/SIO0
5
HUDSON-2
SERIAL
ATA
SD
CARD
GBE
LAN
SPI
ROM
VGA
DAC
VGA
MAINLINK
HW MONITOR
U2B
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
HUDSON-2
SERIAL
ATA
SD
CARD
GBE
LAN
SPI
ROM
VGA
DAC
VGA
MAINLINK
HW MONITOR
U2B
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
SATA_TX0P
AK19
SATA_TX0N
AM19
SATA_RX0N
AL20
SATA_RX0P
AN20
SATA_TX1P
AN22
SATA_TX1N
AL22
SATA_RX1N
AH20
SATA_RX1P
AJ20
SATA_TX2P
AJ22
SATA_TX2N
AH22
SATA_RX2N
AM23
SATA_RX2P
AK23
SATA_TX3P
AH24
SATA_TX3N
AJ24
SATA_RX3N
AN24
SATA_RX3P
AL24
SATA_TX4P
AL26
SATA_TX4N
AN26
SATA_RX4N
AJ26
SATA_RX4P
AH26
SATA_TX5P
AN29
SATA_TX5N
AL28
SATA_RX5N
AK27
SATA_RX5P
AM27
NC6
AL29
NC7
AN31
NC8
AL31
NC9
AL33
NC10
AH33
NC11
AH31
NC12
AJ33
NC13
AJ31
SATA_X2
AG21
SATA_X1
AF21
SATA_CALRP
AF28
SATA_CALRN
AF27
FANOUT0/GPIO52
AH16
FANOUT1/GPIO53
AM15
FANOUT2/GPIO54
AJ16
FANIN0/GPIO56
AK15
FANIN1/GPIO57
AN16
FANIN2/GPIO58
AL16
TEMPIN0/GPIO171
K6
TEMPIN1/GPIO172
K5
TEMPIN2/GPIO173
K3
TEMPIN3/TALERT#/GPIO174
M6
NC1
AG16
NC2
AH10
NC3 A28
NC4 G27
NC5 L4
VIN0/GPIO175
N2
VIN1/GPIO176
M3
VIN2/SDATI_1/GPIO177
L2
VIN3/SDATO_1/GPIO178
N4
VIN4/SLOAD_1/GPIO179
P1
VIN5/SCLK_1/GPIO180
P3
VIN6/GBE_STAT3/GPIO181
M1
VIN7/GBE_LED3/GPIO182
M5
SD_CLK/SCLK_2/GPIO73
AL14
SD_CMD/SLOAD_2/GPIO74
AN14
SD_CD/GPIO75
AJ12
SD_WP/GPIO76
AH12
SD_DATA0/SDATI_2/GPIO77
AK13
SD_DATA1/SDATO_2/GPIO78
AM13
SD_DATA2/GPIO79
AH15
SD_DATA3/GPIO80
AJ14
GBE_COL
AC4
GBE_CRS AD3
GBE_MDCK AD9
GBE_MDIO W10
GBE_RXCLK AB8
GBE_RXD3 AH7
GBE_RXD2 AF7
GBE_RXD1 AE7
GBE_RXD0 AD7
GBE_RXCTL/RXDV AG8
GBE_RXERR AD1
GBE_TXCLK AB7
GBE_TXD3 AF9
GBE_TXD2 AG6
GBE_TXD1 AE8
GBE_TXD0 AD8
GBE_TXCTL/TXEN AB9
GBE_PHY_PD AC2
GBE_PHY_RST# AA7
GBE_PHY_INTR W9
SPI_DI/GPIO164 V6
SPI_DO/GPIO163 V5
SPI_CLK/GPIO162 V3
SPI_CS1#/GPIO165 T6
ROM_RST#/SPI_WP#/GPIO161 V1
VGA_RED
L30
VGA_GREEN
L32
VGA_BLUE
M29
VGA_DAC_RSET
K31
VGA_HSYNC/GPO68
M28
VGA_VSYNC/GPO69
N30
VGA_DDC_SDA/GPO70
M33
VGA_DDC_SCL/GPO71
N32
ML_VGA_HPD/GPIO229
C29
ML_VGA_L0P
T31
ML_VGA_L0N
T33
ML_VGA_L1P
T29
ML_VGA_L1N
T28
ML_VGA_L2P
R32
ML_VGA_L2N
R30
ML_VGA_L3P
P29
ML_VGA_L3N
P28
AUXCAL
U28
AUX_VGA_CH_P
V28
AUX_VGA_CH_N
V29
SATA_ACT#/GPIO67
AD22
R138 10K_0402_5%
R138 10K_0402_5%
1 2
C160
22P_0402_50V8J
@
C160
22P_0402_50V8J
@
R111
33_0402_5%
@
R111
33_0402_5%
@
1
2
R110
0_0402_5%
R110
0_0402_5%
1 2
R117
33_0402_5%
R117
33_0402_5%
1 2
R112
3.3K_0402_5%
R112
3.3K_0402_5%
1 2
R137 10K_0402_5%
R137 10K_0402_5%
1 2
R149 10K_0402_5%
R149 10K_0402_5%
1 2
R119
33_0402_5%
R119
33_0402_5%
1 2
R115
0_0402_5%
R115
0_0402_5%
1 2
R146 10K_0402_5%
R146 10K_0402_5%
1 2
T48
T48
R128
1K_0402_1% R128
1K_0402_1% 1
2
C165
0.1U_0402_16V4Z
C165
0.1U_0402_16V4Z
1 2
R133
10K_0402_5% @ R133
10K_0402_5% @
1 2
R108 10K_0402_5%
R108 10K_0402_5%
1 2
R148 10K_0402_5%
R148 10K_0402_5%
1 2
R130
931_0402_1% R130
931_0402_1% 1
2
R139 10K_0402_5%
R139 10K_0402_5%
1 2
R121 10K_0402_5%
R121 10K_0402_5%
1 2
R151 10K_0402_5%
R151 10K_0402_5%
1 2
WWW.AliSaler.Com

12. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
TEST2
TEST0
SYS_RESET#
WD_PWRGD
FCH_PWRGD
TEST1
FCH_SMCLK0
FCH_SMDAT0
FCH_SMCLK1
FCH_SMDATA1
EC_LID_OUT#
FCH_PCIE_WAKE#
H_THERMTRIP#
HDA_BITCLK
HDA_SDIN0
EC_RSMRST#
FCH_SMCLK0
FCH_SMDAT0
TEST0
TEST1
TEST2
USB_OC1#
HDA_BITCLK
HDA_SDIN0
HDA_SYNC
HDA_SDOUT
HDA_RST#
USB_OC0#
USB_OC2#
USB_RCOMP
USB30_FRX_DTX_P0
USB30_FRX_DTX_N0
USB30_FTX_DRX_P0
USB30_FTX_DRX_N0
EC_PWM2
USB30_FRX_DTX_P1
USB30_FRX_DTX_N1
USB30_FTX_DRX_P1
USB30_FTX_DRX_N1
PEG_CLKREQ#_R
PEG_CLKREQ#_R
WD_PWRGD
WLAN_CLKREQ#
USB_OC3#
USB_OC3#
USB_OC5#
FCH_SMCLK1
FCH_SMDATA1
GPIO190
GPIO189
GPIO189
GPIO190
USB_OC2#
USB_OC0#
USB_OC1#
USB_OC5#
ODD_DA#_FCH
ODD_DETECT#
USBSS_CALRN
USBSS_CALRP
USB_OC7#
USB_OC7#
LAN_CLKREQ#
KBRST#
<30>
EC_LID_OUT#
<30>
GATEA20
<30>
EC_RSMRST#
<30>
H_THERMTRIP#
<5>
PM_SLP_S3#
<30>
PM_SLP_S5#
<30>
PBTN_OUT#
<30>
EC_SMI#
<30>
EC_SCI#
<30>
FCH_PCIE_WAKE#
<25,29>
FCH_SPKR
<27>
FCH_SMCLK0
<8,9,29>
FCH_SMDAT0
<8,9,29>
USB_OC0#
<34>
USB_OC1#
<33>
HDA_SYNC_AUDIO
<27>
HDA_RST_AUDIO#
<27>
HDA_SDIN0
<27>
HDA_SDOUT_AUDIO
<27>
HDA_BITCLK_AUDIO
<27>
USB20_P0 <33>
USB20_N0 <33>
USB20_P1 <32>
USB20_N1 <32>
USB20_P2 <29>
USB20_N2 <29>
USB20_P3 <22>
USB20_N3 <22>
USB30_P10 <34>
USB30_N10 <34>
USB30_P11 <34>
USB30_N11 <34>
USB30_FRX_DTX_N0 <34>
USB30_FRX_DTX_P0 <34>
USB30_FTX_DRX_N0 <34>
USB30_FTX_DRX_P0 <34>
EC_PWM2 <14>
USB30_FRX_DTX_N1 <34>
USB30_FRX_DTX_P1 <34>
USB30_FTX_DRX_N1 <34>
USB30_FTX_DRX_P1 <34>
PEG_CLKREQ#
<16>
USB_OC2#
<32>
PXS_RST#
<15>
PXS_PWREN
<17,43>
WLAN_CLKREQ#
<29>
LAN_CLKREQ#
<25>
VGA_PWRGD
<15,17,43>
ODD_DA#_FCH
<28>
ODD_DETECT#
<28>
FCH_PWRGD
<30,44>
USB20_P5 <32>
USB20_N5 <32>
VGA_GATE#
<30>
USB20_P6 <28>
USB20_N6 <28>
+3VALW
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+FCH_VDD_11_SSUSB_S
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH-ACPI/USB/HDA/GPIO
Custom
12 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH-ACPI/USB/HDA/GPIO
Custom
12 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH-ACPI/USB/HDA/GPIO
Custom
12 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
For FCH internal debug use
PCIE_RST2 : Reset PCIE device on Hudson 3
RP1
WLAN
Root
RP2
Root
Root
CMOS
BT
LP1
LP2
LP1
LP2
0 0
1
0
0
1
UMA Full
UMA Low
PX4 Full
Function
BOARD
Config. GPIO189 GPIO190
strap pin
1 1
PX4 low
CR
FCH-M3LNCpin
FCH-M3LNCpin
FCH-M3LNCpin
FCH-M3LNCpin
R182 10K_0402_5%
PX@
R182 10K_0402_5%
PX@
1 2
R172 2.2K_0402_5%
R172 2.2K_0402_5%
1 2
R155 10K_0402_5%
@
R155 10K_0402_5%
@
1 2
R164 10K_0402_5%
@
R164 10K_0402_5%
@
1 2
R618 10K_0402_5%
@
R618 10K_0402_5%
@
1 2
R154 11.8K_0402_1%
R154 11.8K_0402_1%
1 2
R649 10K_0402_5%
@
R649 10K_0402_5%
@
1 2
R166 10K_0402_5%
R166 10K_0402_5%
1 2
R173 8.2K_0402_5%
R173 8.2K_0402_5%
1 2
R620 10K_0402_5%
@
R620 10K_0402_5%
@
1 2
R175 10K_0402_5%
R175 10K_0402_5%
1 2
R178 10K_0402_5%
@
R178 10K_0402_5%
@
1 2
R165 10K_0402_5%
R165 10K_0402_5%
1 2
R169 100K_0402_5%
@
R169 100K_0402_5%
@
1 2
R684
10K_0402_5%
UMA@
R684
10K_0402_5%
UMA@
1
2
R156 0_0402_5%
@
R156 0_0402_5%
@ 1
2
R624 10K_0402_5%
R624 10K_0402_5%
1 2
R168 10K_0402_5%
R168 10K_0402_5%
1 2
R682
10K_0402_5%
PX@
R682
10K_0402_5%
PX@
1
2
R96
0_0402_5% PX@ R96
0_0402_5% PX@ 1
2
R685
10K_0402_5%
UMA@
R685
10K_0402_5%
UMA@
1
2
USB
OC
GPIO
ACPI
/
WAKE
UP
EVENTS
HD
AUDIO
USB
MISC
USB
1.1
USB
2.0
USB
3.0
EMBEDDED CTRL
HUDSON-2
U2D
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
USB
OC
GPIO
ACPI
/
WAKE
UP
EVENTS
HD
AUDIO
USB
MISC
USB
1.1
USB
2.0
USB
3.0
EMBEDDED CTRL
HUDSON-2
U2D
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
SCL2/GPIO193
H19
SDA2/GPIO194
G19
SCL3_LV/GPIO195
G22
SDA3_LV/GPIO196
G21
EC_PWM0/EC_TIMER0/GPIO197
E22
EC_PWM1/EC_TIMER1/GPIO198
H22
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
J22
EC_PWM3/EC_TIMER3/GPIO200
H21
KSI_0/GPIO201
K21
KSI_1/GPIO202
K22
KSI_2/GPIO203
F22
KSI_3/GPIO204
F24
KSI_4/GPIO205
E24
KSI_5/GPIO206
B23
KSI_6/GPIO207
C24
KSI_7/GPIO208
F18
PS2_DAT/SDA4/GPIO187
K19
PS2_CLK/CEC/SCL4/GPIO188
J19
SPI_CS2#/GBE_STAT2/GPIO166
J21
PS2KB_DAT/GPIO189
D21
PS2KB_CLK/GPIO190
C20
PS2M_DAT/GPIO191
D23
PS2M_CLK/GPIO192
C22
KSO_0/GPIO209
F21
KSO_1/GPIO210
E20
KSO_2/GPIO211
F20
KSO_3/GPIO212
A22
KSO_4/GPIO213
E18
KSO_5/GPIO214
A20
KSO_6/GPIO215
J18
KSO_7/GPIO216
H18
KSO_8/GPIO217
G18
KSO_9/GPIO218
B21
KSO_10/GPIO219
K18
KSO_11/GPIO220
D19
KSO_12/GPIO221
A18
KSO_13/GPIO222
C18
KSO_14/GPIO223
B19
KSO_15/GPIO224
B17
KSO_16/GPIO225
A24
KSO_17/GPIO226
D17
AZ_BITCLK
AB3
AZ_SDOUT
AB1
AZ_SDIN0/GPIO167
AA2
AZ_SDIN1/GPIO168
Y5
AZ_SDIN2/GPIO169
Y3
AZ_SDIN3/GPIO170
Y1
AZ_SYNC
AD6
AZ_RST#
AE4
BLINK/USB_OC7#/GEVENT18#
M7
USB_OC6#/IR_TX1/GEVENT6#
R8
USB_OC5#/IR_TX0/GEVENT17#
T1
USB_OC4#/IR_RX0/GEVENT16#
P6
USB_OC3#/AC_PRES/TDO/GEVENT15#
F5
USB_OC2#/TCK/GEVENT14#
P5
USB_OC1#/TDI/GEVENT13#
J7
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
T8
CLK_REQ4#/SATA_IS0#/GPIO64
AG24
CLK_REQ3#/SATA_IS1#/GPIO63
AE24
SMARTVOLT1/SATA_IS2#/GPIO50
AE26
CLK_REQ0#/SATA_IS3#/GPIO60
AF22
SATA_IS4#/FANOUT3/GPIO55
AH17
SATA_IS5#/FANIN3/GPIO59
AG18
SPKR/GPIO66
AF24
SCL0/GPIO43
AD26
SDA0/GPIO47
AD25
SCL1/GPIO227
T7
SDA1/GPIO228
R7
CLK_REQ2#/FANIN4/GPIO62
AG25
CLK_REQ1#/FANOUT4/GPIO61
AG22
IR_LED#/LLB#/GPIO184
J2
SMARTVOLT2/SHUTDOWN#/GPIO51
AG26
DDR3_RST#/GEVENT7#/VGA_PD
V8
GBE_LED0/GPIO183
W8
SPI_HOLD#/GBE_LED1/GEVENT9#
Y6
GBE_LED2/GEVENT10#
V10
GBE_STAT0/GEVENT11#
AA8
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
AF25
RSMRST#
U2
TEST0
T9
TEST1/TMS
T10
TEST2
V9
GA20IN/GEVENT0#
AE22
KBRST#/GEVENT1#
AG19
LPC_PME#/GEVENT3#
R9
LPC_SMI#/GEVENT23#
C26
LPC_PD#/GEVENT5#
T5
SYS_RESET#/GEVENT19#
U4
WAKE#/GEVENT8#
K1
IR_RX1/GEVENT20#
V7
THRMTRIP#/SMBALERT#/GEVENT2#
R10
WD_PWRGD
AF19
PCIE_RST2#/PCI_PME#/GEVENT4#
AB6
RI#/GEVENT22#
R2
SPI_CS3#/GBE_STAT1/GEVENT21#
W7
SLP_S3#
T3
SLP_S5#
W2
PWR_BTN#
J4
PWR_GOOD
N7
USBCLK/14M_25M_48M_OSC G8
USB_RCOMP B9
USB_FSD1P/GPIO186 H1
USB_FSD1N H3
USB_FSD0P/GPIO185
H6
USB_FSD0N
H5
USB_HSD13P
H10
USB_HSD13N
G10
USB_HSD12P
K10
USB_HSD12N
J12
USB_HSD11P
G12
USB_HSD11N
F12
USB_HSD10P
K12
USB_HSD10N
K13
USB_HSD9P B11
USB_HSD9N D11
USB_HSD8P E10
USB_HSD8N F10
USB_HSD7P C10
USB_HSD7N A10
USB_HSD6P H9
USB_HSD6N G9
USB_HSD5P A8
USB_HSD5N C8
USB_HSD4P F8
USB_HSD4N E8
USB_HSD3P C6
USB_HSD3N A6
USB_HSD2P C5
USB_HSD2N A5
USB_HSD1P C1
USB_HSD1N C3
USB_HSD0P
E1
USB_HSD0N
E3
USBSS_CALRP
C16
USBSS_CALRN
A16
USB_SS_TX3P
A14
USB_SS_TX3N
C14
USB_SS_RX3P
C12
USB_SS_RX3N
A12
USB_SS_TX2P
D15
USB_SS_TX2N
B15
USB_SS_RX2P
E14
USB_SS_RX2N
F14
USB_SS_TX1P
F15
USB_SS_TX1N
G15
USB_SS_RX1P
H13
USB_SS_RX1N
G13
USB_SS_TX0P
J16
USB_SS_TX0N
H16
USB_SS_RX0P
J15
USB_SS_RX0N
K15
R160 33_0402_5%
R160 33_0402_5%
1 2
R227 10K_0402_5%
R227 10K_0402_5%
1 2
R183 2.2K_0402_5%
@
R183 2.2K_0402_5%
@
1 2
R174 10K_0402_5%
R174 10K_0402_5%
1 2
R97
0_0402_5% PX@ R97
0_0402_5% PX@ 1
2
R683
10K_0402_5%
PX@
R683
10K_0402_5%
PX@
1
2
R161 33_0402_5%
R161 33_0402_5%
1 2
R176 8.2K_0402_5%
R176 8.2K_0402_5%
1 2
R167 10K_0402_5%
R167 10K_0402_5%
1 2
R228 10K_0402_5%
R228 10K_0402_5%
1 2
R625 10K_0402_5%
R625 10K_0402_5%
1 2
T61
T61
R159 33_0402_5%
R159 33_0402_5%
1 2
R171 2.2K_0402_5%
R171 2.2K_0402_5%
1 2
R163 10K_0402_5%
@
R163 10K_0402_5%
@
1 2
R177 2.2K_0402_5%
R177 2.2K_0402_5%
1 2
R179 2.2K_0402_5%
@
R179 2.2K_0402_5%
@
1 2
T17
T17
R170 10K_0402_5%
@
R170 10K_0402_5%
@
1 2
R883 10K_0402_5%
@
R883 10K_0402_5%
@
1 2
R864 1K_0402_1%
R864 1K_0402_1%
1 2
T19
T19
R181 2.2K_0402_5%
@
R181 2.2K_0402_5%
@
1 2
R162 33_0402_5%
R162 33_0402_5%
1 2
R180 10K_0402_5%
@
R180 10K_0402_5%
@
1 2
R865 1K_0402_1%
R865 1K_0402_1%
1 2
G
D
S
Q112
2N7002K_SOT23-3
PX@
G
D
S
Q112
2N7002K_SOT23-3
PX@
2
1
3
WWW.AliSaler.Com

13. A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+VDDPL_33_SSUSB_S
+VDDPL_33_USB_S
+VDDPL_33_SYS
+VDDIO_33_PCIGP
+VDDCR_11_SSUSB
+VDDAN_33_USB
+VDDCR_11V_USB
+VDDPL_33_PCIE
+VDDPL_33_SATA
+VDDPL_33_SSUSB_S
+VDDPL_33_SATA
+VDDPL_33_PCIE
+VDDPL_33_USB_S
+VDDPL_11_SYS_S
+VDDAN_33_HWM
+VDDIO_33_S
+1.1VS_CKVDD
+VDDCR_1.1V
+VDDAN_11_PCIE
+VDDXL_3.3V
+VDDIO_AZ
+VCC_VDDCR_11
+VDDAN_11_SSUSB
+VDDAN_11_USB_S
+VDDAN_11_USB_S
+1.1VALW
+3VALW
+3VS
+3VS
+1.1VALW
+3VALW
+VDDPL_33_SYS
+1.1VALW
+3VS
+FCH_VDD_11_SSUSB_S
+3VS
+1.1VS_CKVDD
+1.1VALW
+1.1VS
+AVDD_SATA
+3VALW
+1.1VALW
+1.1VS
+1.1VS
+3VALW
+3VS
+3VALW
+1.1VS
+VDDAN_11_PCIE
+VDDAN_33_USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH PWR
Custom
13 48
Tuesday, November 29, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH PWR
Custom
13 48
Tuesday, November 29, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH PWR
Custom
13 48
Tuesday, November 29, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
424mA
7mA
40mils
47mA
220 ohm/2A
470mA
VDDPL_33_SSUSB_S
For Hudson3 USB3.0 only
For Hudson2, connect to GND
12mA
220 ohm
220 ohm
220 ohm
11mA
220 ohm
220 ohm
42 ohm/4A
220 ohm
102mA
30mA
14mA
11mA
12mA
42mA
220 ohm
20mA
226mA
140mA
LDO_CAP: Internally generated 1.8V
supply for the RGB outputs
282mA
340mA
220 ohm
5mA
220 ohm
26mA
AMD reply:
VDDAN_33_HWM_S: Please connect
it to +3.3V_S5 directly if HWM is not used.
VDDIO_AZ_S should be tied to
+3.3/1.5V_S5 rail if Wake on Ring
is supported
187mA
70mA
12mA
1007mA
59mA
1337mA
1088mA
42ohm @ 100MHz
42ohm @ 100MHz
42ohm @ 100MHz
+VDDXL_3.3V
Tie to +3.3V_S5 rail if USB3 Wake
is supported; otherwise, tie to
+3.3V_S0 rail.
Hudson-2 designs: Tie to +3.3V_S0
rail.
demoboardconnecttoGND
demoboardconnecttoGND
del +VDDPL_33_MLDAC power plane
del +FCH_VDDAN_33_DAC power plane
Add C234 follow AMD
reccommandation 10/28
R198 0_0402_5%
R198 0_0402_5%
1 2
C229
1U_0402_6.3V6K
C229
1U_0402_6.3V6K
1
2
C231
0.1U_0402_16V7K
C231
0.1U_0402_16V7K
1
2
C239
0.1U_0402_16V7K
C239
0.1U_0402_16V7K
1
2
C192
1U_0402_6.3V6K
C192
1U_0402_6.3V6K
1
2
C187
0.1U_0402_16V7K
C187
0.1U_0402_16V7K
1
2
C220
0.1U_0402_16V7K
C220
0.1U_0402_16V7K
1
2
C211
0.1U_0402_16V7K
C211
0.1U_0402_16V7K
1
2
C207
1U_0402_6.3V6K
C207
1U_0402_6.3V6K
1
2
C213
10U_0603_6.3V6M
C213
10U_0603_6.3V6M
1
2
C230
0.1U_0402_16V7K
C230
0.1U_0402_16V7K
1
2
C203
0.1U_0402_16V7K
C203
0.1U_0402_16V7K
1
2
R191 0_0805_5%
R191 0_0805_5%
1 2
C197
22U_0603_6.3V6M
C197
22U_0603_6.3V6M
1
2
R194 0_0805_5%
R194 0_0805_5%
1 2
C206
22U_0603_6.3V6M
C206
22U_0603_6.3V6M
1
2
C176
22U_0603_6.3V6M
C176
22U_0603_6.3V6M
1
2
C238
1U_0402_6.3V6K
C238
1U_0402_6.3V6K
1
2
R187 0_0603_5%
R187 0_0603_5%
1 2
C224
0.1U_0402_16V7K
C224
0.1U_0402_16V7K
1
2
C237
10U_0603_6.3V6M
C237
10U_0603_6.3V6M
1
2
L8
FBMA-L11-201209-221LMA30T_0805
L8
FBMA-L11-201209-221LMA30T_0805
1 2
R196 0_0402_5%
R196 0_0402_5%
1 2
R201
0_0603_5%
R201
0_0603_5%
1 2
C194 2.2U_0603_6.3V4Z
@
C194 2.2U_0603_6.3V4Z
@
1 2
C236 2.2U_0402_6.3V6M
C236 2.2U_0402_6.3V6M
1 2
L6
MBK1608221YZF_2P
L6
MBK1608221YZF_2P
1 2
C183
0.1U_0402_16V7K
C183
0.1U_0402_16V7K
1
2
C218
2.2U_0402_6.3V6M
C218
2.2U_0402_6.3V6M
1
2
C210
2.2U_0402_6.3V6M
C210
2.2U_0402_6.3V6M
1
2
R200 0_0402_5%
R200 0_0402_5%
1 2
C190
0.1U_0402_16V7K
C190
0.1U_0402_16V7K
1
2
C223
10U_0603_6.3V6M
C223
10U_0603_6.3V6M
1
2
L13
MBK1608221YZF_2P
L13
MBK1608221YZF_2P
1 2
L10
MBK1608221YZF_2P
L10
MBK1608221YZF_2P
1 2
C234
0.1U_0402_16V7K
@
C234
0.1U_0402_16V7K
@
1
2
C233
0.1U_0402_16V7K
@
C233
0.1U_0402_16V7K
@
1
2
R197 0_0603_5%
R197 0_0603_5%
1 2
R184 0_0805_5%
R184 0_0805_5%
1 2
C222
1U_0402_6.3V6K
C222
1U_0402_6.3V6K
1
2
L12
MBK1608221YZF_2P
L12
MBK1608221YZF_2P
1 2
C196
1U_0402_6.3V6K
C196
1U_0402_6.3V6K
1
2
C227
2.2U_0402_6.3V6M
C227
2.2U_0402_6.3V6M
1
2
C179
0.1U_0402_16V7K
C179
0.1U_0402_16V7K
1
2
R199
0_0603_5%
R199
0_0603_5%
1 2
L11
MBK1608221YZF_2P
L11
MBK1608221YZF_2P
1 2
C184
0.1U_0402_16V7K
C184
0.1U_0402_16V7K
1
2
R195 0_0402_5%
R195 0_0402_5%
1 2
C177
10U_0603_6.3V6M
C177
10U_0603_6.3V6M
1
2
C208
1U_0402_6.3V6K
C208
1U_0402_6.3V6K
1
2
C221
1U_0402_6.3V6K
C221
1U_0402_6.3V6K
1
2
C212
10U_0603_6.3V6M
C212
10U_0603_6.3V6M
1
2
C181
2.2U_0402_6.3V6M
C181
2.2U_0402_6.3V6M
1
2
C209
2.2U_0402_6.3V6M
C209
2.2U_0402_6.3V6M
1
2
C217
2.2U_0402_6.3V6M
C217
2.2U_0402_6.3V6M
1
2
C205
1U_0402_6.3V6K
C205
1U_0402_6.3V6K
1
2
C226
2.2U_0402_6.3V6M
C226
2.2U_0402_6.3V6M
1
2
C225
0.1U_0402_16V7K
C225
0.1U_0402_16V7K
1
2
L7
MBK1608221YZF_2P
L7
MBK1608221YZF_2P
1 2
C198
2.2U_0402_6.3V6M
C198
2.2U_0402_6.3V6M
1
2
C204
1U_0402_6.3V6K
C204
1U_0402_6.3V6K
1
2
C185
1U_0402_6.3V6K
C185
1U_0402_6.3V6K
1
2
C232
2.2U_0402_6.3V6M
@
C232
2.2U_0402_6.3V6M
@
1
2
C191
1U_0402_6.3V6K
C191
1U_0402_6.3V6K
1
2
R185 0_0603_5%
R185 0_0603_5%
1 2
L4
MBK1608221YZF_2P
L4
MBK1608221YZF_2P
1 2
C193
22U_0603_6.3V6M
C193
22U_0603_6.3V6M
1
2
C240
0.1U_0402_16V7K
C240
0.1U_0402_16V7K
1
2
HUDSON-2
CORE
S0
PCI/GPIO
I/O
CLKGEN
I/O
PCI
EXPRESS
SERIAL
ATA
3.3V_S5
I/O
USB
SS
USB
MAIN
LINK
GBE
LAN
POWER
U2C
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
HUDSON-2
CORE
S0
PCI/GPIO
I/O
CLKGEN
I/O
PCI
EXPRESS
SERIAL
ATA
3.3V_S5
I/O
USB
SS
USB
MAIN
LINK
GBE
LAN
POWER
U2C
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
VDDCR_11_1 T14
VDDCR_11_2 T17
VDDCR_11_3 T20
VDDCR_11_4 U16
VDDCR_11_5 U18
VDDCR_11_6 V14
VDDCR_11_7
V17
VDDCR_11_8
V20
VDDCR_11_9
Y17
VDDAN_11_CLK_1
H26
VDDAN_11_CLK_2
J25
VDDAN_11_CLK_3
K24
VDDAN_11_CLK_4
L22
VDDAN_11_CLK_5
M22
VDDAN_11_CLK_6
N21
VDDAN_11_CLK_7
N22
VDDAN_11_CLK_8
P22
VDDAN_11_PCIE_1 AB24
VDDAN_11_PCIE_2 Y21
VDDAN_11_PCIE_3 AE25
VDDAN_11_PCIE_4 AD24
VDDAN_11_PCIE_5 AB23
VDDAN_11_PCIE_6 AA22
VDDAN_11_PCIE_7 AF26
VDDAN_11_PCIE_8 AG27
VDDAN_11_SATA_1 AA21
VDDAN_11_SATA_4 Y20
VDDAN_11_SATA_2 AB21
VDDAN_11_SATA_3 AB22
VDDAN_11_SATA_5 AC22
VDDAN_11_SATA_6 AC21
VDDAN_11_SATA_7 AA20
VDDAN_11_SATA_8 AA18
VDDAN_11_SATA_9 AB20
VDDAN_11_SATA_10 AC19
VDDIO_33_S_1 N18
VDDIO_33_S_2 L19
VDDIO_33_S_3 M18
VDDIO_33_S_4
V12
VDDIO_33_S_5
V13
VDDIO_33_S_6
Y12
VDDIO_33_S_7
Y13
VDDIO_33_S_8
W11
VDDXL_33_S
G24
VDDCR_11_S_1
N20
VDDCR_11_S_2
M20
VDDPL_11_SYS_S
J24
VDDAN_33_HWM_S
M8
VDDIO_AZ_S
AA4
VDDCR_11_SSUSB_S_1
N16
VDDCR_11_SSUSB_S_2
N17
VDDCR_11_SSUSB_S_3
P17
VDDCR_11_SSUSB_S_4
M17
VDDAN_11_SSUSB_S_1
P16
VDDAN_11_SSUSB_S_2
M14
VDDAN_11_SSUSB_S_3
N14
VDDAN_11_SSUSB_S_4
P13
VDDAN_11_SSUSB_S_5
P14
VDDCR_11_USB_S_1
T12
VDDCR_11_USB_S_2
T13
VDDAN_11_USB_S_1
U12
VDDAN_11_USB_S_2
U13
VDDAN_33_USB_S_1
G7
VDDAN_33_USB_S_2
H8
VDDAN_33_USB_S_3
J8
VDDAN_33_USB_S_4
K8
VDDAN_33_USB_S_5
K9
VDDAN_33_USB_S_6
M9
VDDAN_33_USB_S_7
M10
VDDAN_33_USB_S_8
N9
VDDAN_33_USB_S_9
N10
VDDAN_33_USB_S_10
M12
VDDAN_33_USB_S_11
N12
VDDAN_33_USB_S_12
M11
VDDAN_11_ML_1
Y22
VDDAN_11_ML_2
V23
VDDAN_11_ML_3
V24
VDDAN_11_ML_4
V25
VDDIO_33_GBE_S
AB10
VDDIO_GBE_S_1
AA9
VDDIO_GBE_S_2
AA10
VDDCR_11_GBE_S_1
AB11
VDDCR_11_GBE_S_2
AA11
VDDIO_33_PCIGP_1
AB17
VDDIO_33_PCIGP_2
AB18
VDDIO_33_PCIGP_3
AE9
VDDIO_33_PCIGP_4
AD10
VDDIO_33_PCIGP_5
AG7
VDDIO_33_PCIGP_6
AC13
VDDIO_33_PCIGP_7
AB12
VDDIO_33_PCIGP_8
AB13
VDDIO_33_PCIGP_9
AB14
VDDIO_33_PCIGP_10
AB16
VDDPL_33_SYS
H24
VDDPL_33_DAC
V22
VDDPL_33_ML
U22
VDDAN_33_DAC
T22
VDDPL_33_SSUSB_S
L18
VDDPL_33_USB_S
D7
VDDPL_33_PCIE
AH29
VDDPL_33_SATA
AG28
LDO_CAP
M31
VDDPL_11_DAC
V21
C195
0.1U_0402_16V7K
C195
0.1U_0402_16V7K
1
2
C228
0.1U_0402_16V7K
C228
0.1U_0402_16V7K
1
2
L14
MBK1608221YZF_2P
L14
MBK1608221YZF_2P
1 2
L9
MBK1608221YZF_2P
L9
MBK1608221YZF_2P
1 2
C182
0.1U_0402_16V7K
C182
0.1U_0402_16V7K
1
2
C214
1U_0402_6.3V6K
C214
1U_0402_6.3V6K
1
2
C219
2.2U_0402_6.3V6M
C219
2.2U_0402_6.3V6M
1
2
C186
1U_0402_6.3V6K
C186
1U_0402_6.3V6K
1
2
C200
0.1U_0402_16V7K
C200
0.1U_0402_16V7K
1
2
C189
0.1U_0402_16V7K
C189
0.1U_0402_16V7K
1
2
C216
0.1U_0402_16V7K
C216
0.1U_0402_16V7K
1
2
C178
0.1U_0402_16V7K
C178
0.1U_0402_16V7K
1
2
L15
FBMA-L11-201209-221LMA30T_0805
L15
FBMA-L11-201209-221LMA30T_0805
1
2
C215
1U_0402_6.3V6K
C215
1U_0402_6.3V6K
1
2
WWW.AliSaler.Com

14. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_CLK1
<10>
PCI_CLK3
<10>
PCI_CLK4
<10>
CLK_PCI_EC
<10,30>
LPC_CLK1
<10>
EC_PWM2
<12>
RTC_CLK
<10,30>
PCI_AD27
<10>
PCI_AD26
<10>
PCI_AD25
<10>
PCI_AD24
<10>
PCI_AD23
<10>
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH-VSS/Strap
B
14 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH-VSS/Strap
B
14 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA8681P 0.1
FCH-VSS/Strap
B
14 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
CLKGEN
ENABLED
S5 PLUS
MODE
ENABLED
DEFAULT
CLKGEN
DISABLE
PULL
LOW
PULL
HIGH
DEFAULT
RTC_CLK
LPC_CLK1
LPC ROM
SPI ROM
EC_PWM2
EC
ENABLED
EC
DISABLED
DEFAULT
PCI_CLK1
ALLOW
PCIE GEN2
PCI_CLK3
NON_FUSION
CLOCK MODE
DEFAULT
IGNORE
DEBUG
STRAP
USE
DEBUG
STRAPS
PCI_CLK4 LPC_CLK0_EC
DEFAULT
FORCE
PCIE GEN1
FUSION
CLOCK
MODE
DEFAULT
DEFAULT
S5 PLUS
MODE
DISABLED
STRAP PINS
PCI_AD25 PCI_AD24
USE EEPROM
PCIE STRAPS
USE DEFAULT
PCIE STRAPS
DEFAULT
DEFAULT
USE FC
PLL
DISABLE
ILA
AUTORUN
USE PCI
PLL
DEFAULT
BYPASS
FC PLL
PULL
HIGH
DEFAULT
BYPASS
PCI PLL
PCI_AD27 PCI_AD26
PULL
LOW
DEFAULT
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
PCI_AD23
DEBUG STRAPS
ENABLE
ILA
AUTORUN
DISABLE PCI
MEM BOOT
ENABLE PCI
MEM BOOT
R219
2.2K_0402_5%
R219
2.2K_0402_5%
1
2
R202
10K_0402_5%
R202
10K_0402_5%
1
2
R218
10K_0402_5%
@
R218
10K_0402_5%
@
1
2
R205
10K_0402_5%
@
R205
10K_0402_5%
@
1
2
R209
2.2K_0402_5%
@
R209
2.2K_0402_5%
@
1
2
R213
2.2K_0402_5%
@
R213
2.2K_0402_5%
@
1
2
R220
2.2K_0402_5%
@
R220
2.2K_0402_5%
@
1
2
R208
10K_0402_5%
R208
10K_0402_5%
1
2
R217
10K_0402_5%
R217
10K_0402_5%
1
2
R211
2.2K_0402_5%
@
R211
2.2K_0402_5%
@
1
2
R215
10K_0402_5%
R215
10K_0402_5%
1
2
R212
2.2K_0402_5%
@
R212
2.2K_0402_5%
@
1
2
R216
10K_0402_5%
R216
10K_0402_5%
1
2
R203
10K_0402_5%
@
R203
10K_0402_5%
@
1
2
HUDSON-2
GROUND
U2E
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
HUDSON-2
GROUND
U2E
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
VSS
A3
VSS
A33
VSS
B7
VSS
B13
VSS
D9
VSS
D13
VSS
E5
VSS
E12
VSS
E16
VSS
E29
VSS
F7
VSS
F9
VSS
F11
VSS
F13
VSS
F16
VSS
F17
VSS
F19
VSS
F23
VSS
F25
VSS
F29
VSS
G6
VSS
G16
VSS
G32
VSS
H12
VSS
H15
VSS
H29
VSS
J6
VSS
J9
VSS
J10
VSS
J13
VSS
J28
VSS
J32
VSS
K7
VSS
K16
VSS
K27
VSS
K28
VSS
L6
VSS
L12
VSS
L13
VSS
L15
VSS
L16
VSS
L21
VSS
M13
VSS
M16
VSS
M21
VSS
M25
VSS
N6
VSS
N11
VSS
N13
VSS
N23
VSS
N24
VSS
P12
VSS
P18
VSS
P20
VSS
P21
VSS
P31
VSS
P33
VSS
R4
VSS
R11
VSS
R25
VSS
R28
VSS
T11
VSS
T16
VSS
T18
VSSAN_HWM
N8
VSSXL
K25
VSSPL_SYS
H25
VSS T25
VSS T27
VSS U6
VSS U14
VSS U17
VSS U20
VSS U21
VSS U30
VSS U32
VSS V11
VSS V16
VSS V18
VSS W4
VSS W6
VSS W25
VSS W28
VSS Y14
VSS Y16
VSS Y18
VSS AA6
VSS AA12
VSS AA13
VSS AA14
VSS AA16
VSS AA17
VSS AA25
VSS AA28
VSS AA30
VSS AA32
VSS AB25
VSS AC6
VSS AC18
VSS AC28
VSS AD27
VSS AE6
VSS AE15
VSS AE21
VSS AE28
VSS AF8
VSS AF12
VSS AF16
VSS AF33
VSS AG30
VSS AG32
VSS AH5
VSS AH11
VSS AH18
VSS AH19
VSS AH21
VSS AH23
VSS AH25
VSS AH27
VSS AJ18
VSS AJ28
VSS AJ29
VSS AK21
VSS AK25
VSS AL18
VSS AM21
VSS AM25
VSS AN1
VSS AN18
VSS AN28
VSS AN33
VSSPL_DAC T21
VSSAN_DAC L28
VSSANQ_DAC K33
VSSIO_DAC N28
EFUSE R6
R206
10K_0402_5%
R206
10K_0402_5%
1
2
R204
10K_0402_5%
@
R204
10K_0402_5%
@
1
2
R210
2.2K_0402_5%
@
R210
2.2K_0402_5%
@
1
2
R214
10K_0402_5%
@
R214
10K_0402_5%
@
1
2
R207
10K_0402_5%
@
R207
10K_0402_5%
@
1
2
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15. 5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCIE_VGA
CLK_PCIE_VGA#
PCIE_CRX_C_GTX_P1
PCIE_CRX_C_GTX_N1 PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P1
PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_C_GTX_P3
PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P3
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_P[3..0]
PCIE_CTX_GRX_N[3..0]
PCIE_CRX_GTX_P[3..0]
PCIE_CRX_GTX_N[3..0]
GPU_RST#
GPU_RST#
CLK_PCIE_VGA
<10>
CLK_PCIE_VGA#
<10>
PCIE_CTX_GRX_P[3..0]
<6>
PCIE_CTX_GRX_N[3..0]
<6>
PCIE_CRX_GTX_P[3..0] <6>
PCIE_CRX_GTX_N[3..0] <6>
APU_PCIE_RST#
<10,29>
PXS_RST#
<12>
VGA_PWRGD
<12,17,43>
+1.0VGS
+3VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
ATI_RobsonXT_M2_PCIE/LVDS
B
15 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
LA8681P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
ATI_RobsonXT_M2_PCIE/LVDS
B
15 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
LA8681P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
ATI_RobsonXT_M2_PCIE/LVDS
B
15 48
Wednesday, November 30, 2011
2011/10/12 2013/10/12
Compal Electronics, Inc.
LA8681P
LVDS Interface
C241
0.1U_0402_16V7K PX@
C241
0.1U_0402_16V7K PX@
1
2
LVTMDP
LVDS CONTROL
U6G
ROBSON XT M2
PX@
LVTMDP
LVDS CONTROL
U6G
ROBSON XT M2
PX@
DIGON AJ27
TXCLK_LN_DPE3N AR34
TXCLK_LP_DPE3P AP34
TXCLK_UN_DPF3N AL36
TXCLK_UP_DPF3P AK35
TXOUT_L0N_DPE2N AU35
TXOUT_L0P_DPE2P AW37
TXOUT_L1N_DPE1N AU39
TXOUT_L1P_DPE1P AR37
TXOUT_L2N_DPE0N AR35
TXOUT_L2P_DPE0P AP35
TXOUT_L3N AP37
TXOUT_L3P AN36
TXOUT_U0N_DPF2N AK37
TXOUT_U0P_DPF2P AJ38
TXOUT_U1N_DPF1N AJ36
TXOUT_U1P_DPF1P AH35
TXOUT_U2N_DPF0N AH37
TXOUT_U2P_DPF0P AG38
TXOUT_U3N AG36
TXOUT_U3P AF35
VARY_BL AK27
PCI
EXPRESS
INTERFACE
CLOCK
CALIBRATION
U6A
ROBSON XT M2
PX@
PCI
EXPRESS
INTERFACE
CLOCK
CALIBRATION
U6A
ROBSON XT M2
PX@
PWRGOOD
AH16 PCIE_CALRN Y29
PCIE_CALRP Y30
PCIE_REFCLKN
AA36
PCIE_REFCLKP
AB35
PCIE_RX0N
Y37
PCIE_RX0P
AA38
PCIE_RX10N
K37
PCIE_RX10P
L38
PCIE_RX11N
J36
PCIE_RX11P
K35
PCIE_RX12N
H37
PCIE_RX12P
J38
PCIE_RX13N
G36
PCIE_RX13P
H35
PCIE_RX14N
F37
PCIE_RX14P
G38
PCIE_RX15N
E37
PCIE_RX15P
F35
PCIE_RX1N
W36
PCIE_RX1P
Y35
PCIE_RX2N
V37
PCIE_RX2P
W38
PCIE_RX3N
U36
PCIE_RX3P
V35
PCIE_RX4N
T37
PCIE_RX4P
U38
PCIE_RX5N
R36
PCIE_RX5P
T35
PCIE_RX6N
P37
PCIE_RX6P
R38
PCIE_RX7N
N36
PCIE_RX7P
P35
PCIE_RX8N
M37
PCIE_RX8P
N38
PCIE_RX9N
L36
PCIE_RX9P
M35
PERSTB
AA30
PCIE_TX0N Y32
PCIE_TX0P Y33
PCIE_TX10N L32
PCIE_TX10P L33
PCIE_TX11N L29
PCIE_TX11P L30
PCIE_TX12N K32
PCIE_TX12P K33
PCIE_TX13N J32
PCIE_TX13P J33
PCIE_TX14N K29
PCIE_TX14P K30
PCIE_TX15N H32
PCIE_TX15P H33
PCIE_TX1N W32
PCIE_TX1P W33
PCIE_TX2N U32
PCIE_TX2P U33
PCIE_TX3N U29
PCIE_TX3P U30
PCIE_TX4N T32
PCIE_TX4P T33
PCIE_TX5N T29
PCIE_TX5P T30
PCIE_TX6N P32
PCIE_TX6P P33
PCIE_TX7N P29
PCIE_TX7P P30
PCIE_TX8N N32
PCIE_TX8P N33
PCIE_TX9N N29
PCIE_TX9P N30
C247
0.1U_0402_16V7K PX@
C247
0.1U_0402_16V7K PX@
1
2
C248
0.1U_0402_16V7K PX@
C248
0.1U_0402_16V7K PX@
1
2
C244
0.1U_0402_16V7K PX@
C244
0.1U_0402_16V7K PX@
1
2
R223
1.27K_0402_1% PX@ R223
1.27K_0402_1% PX@
1 2
C245
0.1U_0402_16V7K PX@
C245
0.1U_0402_16V7K PX@
1
2
R226
100K_0402_5%
PX@
R226
100K_0402_5%
PX@
1
2
U7
MC74VHC1G08DFT2G SC70 5P
PX@
U7
MC74VHC1G08DFT2G SC70 5P
PX@
B
2
A
1
Y 4
P
5
G
3
C243
0.1U_0402_16V7K PX@
C243
0.1U_0402_16V7K PX@
1
2
R224
10K_0402_5%
PX@
R224
10K_0402_5%
PX@ 1
2
R221 0_0402_5%
@
R221 0_0402_5%
@ 1
2
C246
0.1U_0402_16V7K PX@
C246
0.1U_0402_16V7K PX@
1
2
C242
0.1U_0402_16V7K PX@
C242
0.1U_0402_16V7K PX@
1
2
R222 0_0402_5%
@
R222 0_0402_5%
@ 1
2
R225
2K_0402_1% PX@ R225
2K_0402_1% PX@
1 2
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