This presentation briefly explains the BIP Design Flow from the application model development/generation to the automatic C code generation.

1. BIP Design Flow Rigorous design methodology for critical real-time embedded systems

2. Target applications Software control of critical systems… Transport (automotive, avionics, etc.) Robotics Healthcare …must satisfy safety requirements Deadlock-freedom BIP is your solution For the analysis of existing applications For the development of correct by construction applications

3. Industrial context Concurrent systems are hard to design and verify Cause: state space explosion Solution: compositional approach Different languages and tools are hard to integrate Cause: incompatible or undefined semantics Solution: transformation to a common formalism The BIP Design Flow features Rigorous compositional design methodology Unifying semantic model Correctness by construction

4. Component-based design flow Deadlock analysis Performance optimization Models & information at different design stages In light blue – provided by the designer In black – generated by automatic transformation tools

5. Application model Application model is designed directly in BIP or… …using a language factory transformation from C, AADL, NesC/TinyOS, MathLab/Simulink, Lustre, DOL, GeNoM Safety properties are verified on this model Compositional and incremental deadlock detection (D-Finder tool) High performance even on models that other tools fail to analyze

6. Abstract system model Abstract system model is generated by a transformation using The model of the target execution platform (processor(s), memory, etc.) A mapping of atomic components to the processing units It takes in account The hardware architecture constraints (e.g. mutual exclusion) The execution times of atomic actions The scheduling policies seeking optimal resource utilization.

7. Concrete system model Concrete system model is obtained by expressing high level BIP coordination mechanisms… Atomic multiparty interactions Priorities …by using primitives of the execution platform For examle, protocols using asynchronous message passing

8. Generated code C code is automatically generated for each processing unit Generated code is monolithic, minimizing the coordination overhead

9. Benefits Analysis V&V cost reduction Qualification and certification assistance Development Development methodology supported by theoretical results Shorter time-to-market Development effort focused on business specific challenges Componentization Simplification and quality improvement of the existing code base Component re-use throughout the company Simplified coordination with outside partners

10. Contacts Joseph Sifakis Joseph.Sifakis@imag.fr Simon Bliudze Simon.Bliudze@cea.fr More information on the BIP design flow http://www-verimag.imag.fr/The-BIP-Design-Flow.html