1. Ec8353 electron devices and circuits
unit-ii
transistor and thyristor
Preparedby,
E.ELAKKIA,
ASSISTANT PROFESSOR/EEE,
R.M.K.ENGINEERING COLLEGE
06-Jul-20 1E.ELAKKIA/AP/EEE/RMKEC
2. DAY 1
Introduction to Bipolar
junction transistor and their
configurations
06-Jul-20 2E.ELAKKIA/AP/EEE/RMKEC
9. INTRODUCTION
• TRANSfer + resISTOR = TRANSISTOR
• Amplificationin transistor is achieved by passing input
current signal from region of low resistance to a region of
high resistance. This concept of transfer of resistance has give
name TRANSISTOR
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11. BJT-INTRODUCTION
• A bipolar junction transistor (BJT) is a three terminal device
in which operation depends on the interaction of both
majority and minority carriers and hence the name bipolar.
• The BJT is analogous to vacuum triode and is comparatively
smaller in size.
• It is used in amplifier and oscillatorcircuits, and as a switch
in digital circuits. It has wide applicationsin computers,
satellites and other modern communicationsystems.
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13. BJT STRUCTURE
• The BJT is constructed with three doped semiconductor
regions separated by two pn junctions, as shown in the
epitaxial planar structure.
• The three regions are called emitter, base, and collector.
• One type consists of two n regions separated by a p region
(npn), and the other type consists of two p regions separated
by an n region (pnp).
• The term bipolar refers to the use of both holes and electrons
as current carriers in the transistor structure
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14. BJT STRUCTURE
• The pn junction joining the base region and the emitter
region is called the base-emitter junction. The pn junction
joining the base region and the collector region is called the
base-collector junction.
• The base region is lightly doped and very thin compared to
the heavily doped emitter and the moderately doped
collector regions.
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15. 06-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 15
3 layer semiconductor device consisting:
2 n- and 1 p-type layers of material npn transistor
2 p- and 1 n-type layers of material pnp transistor
A single pn junction has two different types of bias:
forward bias
reverse bias
Thus, a two-pn-junction device has four types of bias.
17. Npn &pnp symbol of BJT
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• -The arrow is always drawn on the emitter
-The arrow indicates the direction of
the emitter current:
npn: B E pnp:E B
E.ELAKKIA/AP/EEE/RMKEC
21. 06-Jul-20 21
• By imaging the analogy of diode, transistor can be construct like two diodes that connected
together.
• It can be conclude that the work of transistor is base on work ofdiode.
E.ELAKKIA/AP/EEE/RMKEC
24. DOPING LEVEL IN TRANSISTOR
06-Jul-20 24
• Base is located at the middle and more thin from
the level of collector and emitter
• The emitter and collector terminals are made of the
same type of semiconductor material, while the
base of the other type of material
Emitter- Heavilydoped
Base- lightlydoped
Collector-moderately doped
E.ELAKKIA/AP/EEE/RMKEC
25. WORKING OF NPN TRANSISTOR
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26. WORKING OF NPN TRANSISTOR
• Emitter base junction is forward biased and collector base
junction is reverse biased. Due to emitter base junction is forward
biased lot of electrons from emitter entering the base region.
• Base is lightly doped with P-type impurity. So the number of
holes in the base region is very small.
• Due to this, electron- hole recombination is less (i.e,) few
electrons(<5%) combine with holes to constitute base current(IB)
• The remaining electrons (>95%) crossover into collector region, to
constitute collector current(IC).
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27. WORKING OF PNP TRANSISTOR
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28. WORKING OF PNP TRANSISTOR
• Emitter base junction is forward biased and collector base
junction is reverse biased. Due to emitter base junction is forward
biased lot of holes from emitter entering the base region and
electrons from base to emitter region.
• Base is lightly doped with N-type impurity. So the number of
electrons in the base region is very small.
• Due to this, electron- hole recombination is less (i.e,) few holes
(<5%) combine with electrons to constitute base current(IB)
• https://www.youtube.com/watch?v=7ukDKVHnac4&t=194s
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29. Bipolar Transistor Configurations
• A transistor is a three terminal device. But require '4‘ terminals for
connecting it in a circuits. (i.e.) 2 terminals for input, 2 terminals for
output.
• Hence one of the terminal is made common to the input and output
circuits. Common terminal is grounded.
1. Common Base Configuration - has Voltage Gain but no Current Gain.
2 Common Emitter Configuration - has both Current and Voltage Gain.
3. Common Collector Configuration - has Current Gain but no Voltage Gain.
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32. COMMON-BASE CONFIGURATION
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•In common base configuration circuit , base is grounded and it is used as the
common terminal for both input and output.
•It is also called as grounded base configuration. Emitter is used as a input
terminal where as collector is the output terminal.
33. INPUT CHARACTERISTICS-CB
CONFIGURATION
• The input characteristic curve drawn
between input voltage to input current
whereas output voltage is constant.
• To determine input characteristics, the
collector base voltage VCB is kept
constant at zero and emitter current IE
is increased from zero by increasing
VEB. This is repeated for higher fixed
values of VCB.
• A curve is drawn between emitter
current and emitter base voltage at
constant collector base voltage is
shown.
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34. Early effect
• Otherwise called as Base width modulation
• As the collector voltage vcc is made to increase the reverse
bias, space charge width between collector and base tends to
increase with the result that effective width of base value
decreases
• This dependency of base width on collector to emitter
voltage is known as Early effect.
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35. Consequences of early effect
i. There is a less chance for recombination within the base
region. Hence α = Ic/Ie increasing with Vcb.
ii. Charge gradient is increases within base and consequently
current of minority carrier injected across the emitter
junction.
iii. For extremely large voltage, effective base-width may be
reduced to zero causing voltage breakdownin transistor.
This phenomenon is called punch through
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36. outPUT CHARACTERISTICS-CB
CONFIGURATION
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•It is defined as the characteristic curve
drawn between output voltage to output
current whereas input current is constant.
•To determine output characteristics, the
emitter current IE is kept constantat zero
and collector current Ic is increased from
zero by increasing VCB. This is repeated
for higher fixed values of IE.
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• From the characteristic it is seen that for a constant value of IE,
Ic is independent of VCB and the curves are parallel to the axis
of VCB.As the emitter base junction is forward biased the
majority carriers that is electrons from the emitter region are
injected into the base region.
• In CB configurationa variation of the base-collector voltage
results in a variation of the quasi- neutral width in the base.
The gradient of the minority-carrier density in the base
therefore changes, yielding an increased collector current as
the collector-basecurrent is increased. This effect is referred to
as the Early effect.
40. COMMON-EMITTER CONFIGURATION
• In common emitter configuration circuit , emitter is grounded and it is used as the
common terminal for both input and output.
• It is also called as grounded emitter configuration. Base is used as a input
terminal whereas collector is the output terminal.
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41. INPUT CHARACTERISTICS-CE
CONFIGURATION
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•To determine input characteristics, the collector base
voltage VCB is kept constantat zero and base current IB
is increased from zero by increasing VBE. This is
repeated for higher fixed values of VCE.
•A curve is drawn between base current and base
emitter voltage at constant collector base voltage .Here
the base width decreases. So curve moves right as
VCE increases.
42. OUTPUT CHARACTERISTICS-CE
CONFIGURATION
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• To determine output characteristics,
the base current IB is kept constant at
zero and collector current Ic is increased
from zero by increasing VCE. This is
repeated for higher fixed values of IB.
• From the characteristic it is seen that
for a constantvalue of IB, Ic is
independent of VCB and the curves are
parallel to the axis of VCE.
48. COMMON-COLLECTOR CONFIGURATION
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• In common collector configuration circuit , collector is grounded and it is used as
the common terminal for both input and output. It is also called as grounded
collector configuration.
• Base is used as a input terminal whereas emitter is the output terminal.
49. INPUT CHARACTERISTICS-CC
CONFIGURATION
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•To determine input characteristics, the
emitter base voltage VEB is kept constant
at zero and base current IB is increased
from zero by increasing VBC.
•This is repeated for higher fixed values of
VCE.A curve is drawn between base
current and base emitter voltage at
constantcollector base voltage
50. OUTPUT CHARACTERISTICS-CC
CONFIGURATION
06-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 50
• To determine output characteristics, the
base current IB is kept constantat zero
and emitter current IE is increased from
zero by increasing VEC. This is repeated
for higher fixed values of IB.
•From the characteristic it is seen that for
a constant value of IB, IE is independent
of VEB and the curves are parallel to the
axis of VEC.
51. COMPARISON OF CB, CE & CC
CONFIGURATION
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52. summary
• Three terminal, three layer, two junction device.
• Current controlled device
• Bipolar device
• Input impedance is less than FET
• Emitter base junction is F.B and Collector base junction is R.B
• CB, CE, CC Configuration
• CE configurationis commonly used in amplifier
06-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 52
53. DAY 2
field effect TRANSISTOR and its
applications
E.ELAKKIA,
ASSISTANTPROFESSOR/EEE,
R.M.K.ENGINEERING COLLEGE
07-Jul-20 53E.ELAKKIA/AP/EEE/RMKEC
54. CONTENTS
Classificationof FET
FET Introduction
JFET- Symbol, Construction & working
JFET Biasing
JFET Drain and transfer characteristics
MOSFET- Types, Symbol, construction & working
E-MOSFET & D-MOSFET characteristics
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55. Classification of FET
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• There are many ways to define the
different types of FET that are available.
They may be categorised in a number of
ways, but some of the major types of FET
can be covered in the tree diagram.
• Junction FET(JFET), Insulated Gate
FET(IGFET), Metal Oxide Silicon
FET(MOSFET), Dual Gate
MOSFET(DGMOSFET), MEtal Silicon
FET(MESFET), High Electron Mobility
Transistor (HEMT) , Pseudomorphic High
Electron Mobility Transistor( PHEMT), Fin
Field Effect Transistor(FinFET).
56. FEATURES OF FET
• Voltage controlled device
• Field effect- output current flow is controlled by an electric
field set up in device by an externally applied voltage
between gate and source.
• Unipolardevice
• Very high input impedance(1 to several MΩ)
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57. INTRODUCTION
The FET is based around the concept that charge on a nearby
object can attract charges within a semiconductor channel.
The FET consists of a semiconductor channel with electrodes at
either end referred to as the drain and the source.
A control electrode called the gate is placed in very close proximity
to the channel so that its electric charge is able to affect the
channel
In this way, the gate of the FET controls the flow of carriers
(electrons or holes) flowing from the source to drain. It does this by
controlling the size and shape of the conductive channel.
07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 57
58. 07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 58
• FETs are unipolar devices because, unlike BJTs that use both electron and
hole current, they operate only with one type of charge carrier.
• The two main types of FETs are the junction field-effect transistor (JFET) and
the metal oxide semiconductor field-effect transistor (MOSFET).
• The term field-effect relates to the depletion region formed in the channel of
a FET as a result of a voltage applied on one of its terminals (gate).
• FETs are voltage-controlled device, where the voltage between two of the
terminals (gate and source) controls the current through the device.
• A major advantage of FETs is their very high input resistance. Because of
their nonlinear characteristics, they are generally not as widely used in
amplifiers as BJTs except where very high input impedances are required.
• However, FETs are the preferreddevice in low-voltage switching applications
because they are generally faster than BJTs when turned on and off.
59. JUCNTION FIELD EFFECT TRANSISTOR
• The JFET ( junction field-effect transistor) is a type of FET that
operates with a reverse-biased pn junction to control current in a
channel. Depending on their structure, JFETs fall into either of two
categories, n channel or p channel.
• The arrow on the gate points “in” for n channel and “out” for p
channel.
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60. STRUCTURE OF JFET
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Wire leads are connected to each end
of the n-channel; the drain is at the upper
end, and the source is at the lower end.
Two p-type regions are diffused in the
n-type material to form a channel, and
both p-type regions are connected to the
gate lead. For simplicity, the gate lead is
shown connected to only one of the p
regions.
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The N-channel JFET’s channel is doped with donor impurities
meaning that the flow of current through the channel is
negative (hence the term N- channel) in the form of electrons.
The P-channel JFET’s channel is doped with acceptor
impurities meaning that the flow of current through the channel
is positive (hence the term P- channel) in the form of holes.
N-channel JFET’s have a greater channel conductivity (lower
resistance) than their equivalent P-channel types, since
electrons have a higher mobility through a conductor compared
to holes. This makes the N-channel JFET’s a more efficient
conductor compared to their P-channel counterpart
62. BIASING OF N-CHANNEL JFET
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•To illustrate the operation of a JFET, Figure shows dc bias voltages
applied to an n-channel device.
•VDD provides a drain-to-source voltage and supplies current from
drain to source. VGG sets the reverse-bias voltage between the
gate and the source
•The JFET is always operated with the gate-source pn junction
reverse-biased. Reverse biasing of the gate-source junction with a
negative gate voltage produces a depletion region along the pn
junction, which extends into the n channel and thus increases its
resistance by restricting the channel width.
•The channel width and thus the channel resistance can be
controlled by varying the gate voltage, thereby controlling the
amount of drain current, ID.
•The white areas represent the depletion region created by the
reverse bias. It is wider toward the drain end of the channel
because the reverse-bias voltage between the gate and the drain is
greater than that between the gate and the source.
63. EFFECT OF VGS ON CHANNEL WIDTH,
RESISTANCE AND DRAIN CURRENT
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64. DRAIN CHARACTERISTIC CURVE
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Consider the case when the gate-to-sourcevoltage is zero (VGS 0 V). This is
produced by shorting the gate to the source, where both are grounded.
65. DRAIN CHARACTERISTIC CURVE
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As VDD (and thus VDS) is increased from 0 V, ID will
increase proportionally, between points A and B. In this
area, the channel resistance is essentially constant
because the depletion region is not large enough to
have significant effect. This is called the ohmic region
because VDS and ID are related by Ohm’s law.
At point B , the curve levels off and enters the active
region where ID becomes essentially constant. As VDS
increases from point B to point C, the reverse-bias
voltage from gate to drain (VGD) produces a depletion
region large enough to offset the increase in VDS, thus
keeping ID relatively constant.
66. PINCH OFF VOLTAGE
For VGS 0 V, the value of VDS at which ID becomes essentially
constant (point B on the curve ) is the pinch-off voltage, VP.
For a given JFET, VP has a fixed value. As you can see, a continued
increase in VDS above the pinchoff voltage produces an almost
constant drain current. This value of drain current is IDSS (Drain
to Source current with gate Shorted) and is always specified on
JFET datasheets.
IDSS is the maximum drain current that a specific JFET can
produce regardless of the external circuit, and it is always
specified for the condition, VGS= 0 V.
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67. BREAKDOWN VOLTAGE
Breakdown occurs at point C when ID
begins to increase very rapidly with any
further increase in VDS. Breakdown can
result in irreversible damage to the device,
so JFETs are always operated below
breakdownand within the active region
(constant current) (between points B and C
on the graph). The JFET action that produces
the drain characteristic curve to the point of
breakdownfor VGS= 0 V
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69. VGS CONTROL ID
• Let’s connect a bias voltage, VGG, from gate to source. As
VGS is set to increasingly more negative values by adjusting
VGG, a family of drain characteristic curves is produced.
• ID decreases as the magnitude of VGS is increased to larger
negative values because of the narrowing of the channel.
• Also, for each increase in VGS, the JFET reaches pinch-off
(where constant current begins) at values of VDS less than VP.
The term pinch-off is not the same as pinchoff voltage, Vp.
Therefore, the amount of drain current is controlled by VGS
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71. CUTOFF VOLTAGE
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The value of VGS that makes ID
approximately zero is the cutoff
voltage, VGS(off). The JFET must be
operated between VGS 0 V and
VGS(off). For this range of gate-to-
source voltages, ID will vary from a
maximum of IDSS to a minimum of
almost zero.
72. COMPARISON OF PINCH OFF AND CUTOFF
VOLTAGE
• The pinch-off voltage VP is the value of VDS at which the
drain current becomes constant and equal to IDSS and is
always measured at VGS = 0 V.
• However pinch-off occurs for VDS values less than VP when
VGS is nonzero. So, although VP is a constant, the minimum
value of VDS at which ID becomes constant varies with VGS.
• VGS(off) and VP are always equal in magnitude but opposite
in sign. A datasheet usually will give either VGS(off) or VP, but
not both. For example, if VGS(off) = -5 V, then VP = +5 V,
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73. TRANFER CHARACTERISTICS
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For an n-channel JFET, VGS(off) is negative,
and for a p-channel JFET, VGS(off) is positive.
Because VGS does control ID, the relationship
between these two quantities is very important.
Transfer characteristic curve that illustrates
graphically the relationship between VGS and
ID. This curve is also known as a
transconductance curve.
74. RELATION BETWEEN TRANSFER AND
DRAIN CHARACTERISTICS
07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 74
The transfer characteristic curve can
also be developed from the drain
characteristic curves by plotting values
of ID for the values of VGS taken from
the family of drain curves at pinch-off.
Each point on the transfer
characteristic curve corresponds to
specific values of VGS and ID on the
drain curves.
75. TRANSCONDUCTANCE
07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 75
The forward transconductance (transfer
conductance), gm, is the change in drain
current for a given change in gate-to-source
voltage with the drain-to-source voltage
constant.It is expressed as a ratio and has
the unit of siemens (S).
77. Metal Oxide Semiconductor Field
Effect-MOSFET
07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 77
The MOSFET, different from the JFET,
has no pn junction structure; instead, the
gate of the MOSFET is insulated from the
channel by a silicon dioxide (SiO2) layer.
The two basic types of MOSFETs are
enhancement (E) and depletion(D).
Of the two types, the enhancement
MOSFET is more widely used.
Otherwise called as IGFETs (insulated-
gate FETs).
Voltage controlled device
78. E-MOSFET- structure
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The E-MOSFET operates only in the enhancement
mode and has no depletion mode.
It differs in construction from the D-MOSFET, the
substrate extends completely to the SiO2 layer.
For an n-channel device, a positive gate voltage above
a threshold value induces a channel by creating a thin
layer of negative charges in the substrate region adjacent
to the SiO2 layer.
The conductivity of the channel is enhanced by
increasing the gate-to-source voltage and thus pulling
more electrons into the channel area.
For any gate voltage below the threshold value, there
is no channel.
80. E-MOSFET-SYMBOL
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The schematic symbols for the n-channel
and p-channel E MOSFETs. The broken lines
symbolize the absence of a physical channel.
An inward pointing substrate arrow is for
n channel, and an outward-pointing arrow is
for p channel.
Some E-MOSFET devices have a separate
substrate connection.
81. E-MOSFET TRANSFER CHARACTERISTICS
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•The E-MOSFET uses only channel enhancement.
Therefore, an n-channel device requires a positive
gate-to-source voltage, and a p-channel device
requires a negative gate-to-source voltage.
•There is no drain current when VGS 0.
•Therefore, the E-MOSFET does not have a significant
IDSS parameter, as do the JFET and the D-MOSFET.
•Notice also that there is ideally no drain current until
VGS reaches a certain nonzero value called the
threshold voltage, VGS(th).
85. D-MOSFET- structure
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In the depletion MOSFET (D-MOSFET), drain
and source are diffused into the substrate
material and then connectedby a narrow
channel adjacent to the insulated gate.
n-channel device is used to describe the basic
operation. The p-channel operation is the same,
except the voltage polarities are opposite those
of the n-channel.
86. 07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 86
• The D-MOSFET can be operated in either of two modes—the
depletion mode or the enhancement mode—and is sometimes
called a depletion/enhancement MOSFET.
• Since the gate is insulated from the channel, either a positive or
a negative gate voltage can be applied.
• The n-channel MOSFET operates in the gate-to-source voltage
is applied and in the enhancement mode when a positive
gate-to-source voltage is applied. These devices are generally
operated in the depletion mode.
88. Depletion mode
• Visualize the gate as one plate of a parallel-plate capacitor and the channel as
the other plate. The silicon dioxide insulating layer is the dielectric.
• With a negative gate voltage, the negative charges on the gate repel
conduction electrons from the channel, leaving positive ions in their place.
Thereby, the n channel is depleted of some of its electrons, thus decreasing
the channel conductivity.
• The greater the negative voltage on the gate, the greater the depletion of n-
channel electrons.
• At a sufficiently negative gate-to-source voltage, VGS(off ), the channel is
totally depleted and the drain current is zero.
• Like the n-channel JFET, the n-channel D-MOSFET conducts drain current for
gate-to-source voltages between VGS(off ) and zero. In addition, the D-
MOSFET conducts for values of VGS above zero.
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89. ENHANCEMENT MODE
• With a positive gate voltage, more conductionelectrons are
attracted into the channel, thus increasing (enhancing) the
channel conductivity
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90. D-MOSFET-SYMBOL
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•The schematic symbols for both the n
channel and the p-channel depletion
MOSFETs.
•The substrate, indicated by the arrow, is
normally (but not always) connected
internally to the source.
•Sometimes, there is a separate
substrate pin.
91. D-MOSFET TRANSFER CHARACTERISTICS
07-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 91
•The D-MOSFET can operate with either
positive or negative gate voltages. This
is indicated on the general transfer
characteristic curves for both n-channel
and p-channel MOSFETs. The point on
the curves where VGS =0 corresponds
to IDSS. The point where ID =0
corresponds to VGS(off).
99. DAY 3
Role of UJT in relaxation oscillator
circuit and overview of IGBT operation
E.ELAKKIA,
ASSISTANTPROFESSOR/EEE,
R.M.K.ENGINEERING COLLEGE
08-Jul-20 99E.ELAKKIA/AP/EEE/RMKEC
WEBINAR SERIES ON INTRODUCTION TO SEMICONDUCTOR DEVICES
100. UNIJUNCTION TRANSISTOT-UJT
• The term unijunction refers to the fact that the UJT has a
single pn junction.
• The UJT is useful in certain oscillator applications and as a
triggering device in thyristor circuits.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 100
101. CONSTRUCTION OF UJT
• The UJT has three terminals designated B1, B2 and E.
• The base material for a UJT is a lightly doped N-Type
Silicon bar with ohmic contacts given at the lengthwise
ends. These end terminals are called B1 and B2.
• Since the silicon bar is lightly doped, the resistance
between B1 and B2 is very high (typically 5 to 10 KΩ).
• A heavily doped P-type region is constructed on one
side of the bar close to the B2 region. This heavily
doped P region is called emitter and it is designated as
E.
• Resistance between E & B1 is higher than the resistance
between E & B2 because E is constructed close to B2.
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102. UJT-symbol
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•Notice the terminals are labelled Emitter (E), Base 1 , and Base 2
•Do not confuse this symbol with that of a JFET; the difference is
that the arrow is at an angle for the UJT.
•In symbolic representation of UJT, the emitter is shown by an
arrow which is at an angle tovertical line representing n-type
material. This arrow indicates the direction of flow of
conventional current when UJT is forward biased.
• The UJT has only one pn junction, and therefore, the
characteristics of this device are different from those of either
the BJT or the FET
103. EQUIVALENT CIRCUIT
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 103
• The diode shown in the figure represents the
pn junction, r’B1 represents the internal dynamic
resistance of the silicon bar between the
emitter and base 1.
• r'B2 represents the dynamic resistance between
emitter and base2
• Total resistance between base terminal is sum
of and is called interbase resistance rBB’.
• rBB’= r’B1 + r'B2 , typical value 5 to 10KΩ
104. EQUIVALENT CIRCUIT
• Value of r’B1 varies inversely with emitter
current IE and it is shown as variable
resistor.
• Depending on IE,the value OF r’B1 can
vary from several thousand ohms to ten
of ohms.(rB1= 4kΩ to 40Ω)
• Internal resistance r’B1 & r’B2 form a
voltage divider when device is biased. The
voltage across the resistance r’B1 can be
expressed as V’rB1= (r’B1/r’BB)VBB
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 104
105. intrinsic standoff ratio
• The ratio (r’B1/r’BB) is a UJT characteristic called the intrinsic
standoff ratio and is designated by η
• V’rB1= η VBB
• Typical range of η is from 0.5 to 0.8
• Voltage V’rB1 is called intrinsic standoff voltage because it
keeps the emitter R.B for all emitter voltages less than VrB1.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 105
106. PRINCIPLE OF OPERATION
ON STATE
• As VEE increases, the UJT stays in the OFF state until VE approaches the peak point value
V P. As VE approaches VP the p–n junction becomes forward- biased and begins to
conduct in the opposite direction.
• As a result IE becomes positive near the peak point P on the VE - IE curve. When VE
exactly equals VP the emitter current equals IP .
• At this point holes from the heavily doped emitter are injected into the n-type bar,
especially into the B1 region. The bar, which is lightly doped, offers very little chance for
these holes to recombine.
• The lower half of the bar becomes replete with additional current carriers (holes)
and its resistance RB is drastically reduced; the decrease in BB1 causes Vx to drop.
• This drop, in turn, causes the diode to become more forward-biased and IE
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 106
107. PRINCIPLE OF OPERATION
OFF STATE
The VEE source is applied to the emitter which is the p-side.
Thus, the emitter diode will be reverse-biased as long as
VEE is less than Vx. This is OFF state and is shown on the
VE - IE curve as being a very low current region.
In the OFF the UJT has a very high resistance between E
and B1, and IE is usually a negligible reverse leakage
current. With no IE, the drop across RE is zero and the
emitter voltage equals the source voltage.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 107
109. Ujt characteristics
Cutoff
• Cutoff region is the area where the Unijunction Transistor (UJT) doesn’t get
sufficient voltage to turn on. The applied voltage hasn’t reached the triggering
voltage, thus making transistor to be in off state.
Negative Resistance Region
• When the transistor reaches the triggering voltage, VTRIG, Unijunction
Transistor (UJT) will turn on. After a certain time, if the applied voltage
increases to the emitter lead, it will reach out at VPEAK. The voltage drops from
VPEAK to Valley Point even though the current increases (negative resistance).
Saturation
• Saturation region is the area where the current and voltage raises, if the
applied voltage to emitter terminal increases.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 109
110. Ujt APPLICATION
• Switching Device
• Triggering Device for Triacs and SCR’s
• Timing Circuits
• For phase control
• In sawtooth generators
• In simple relaxation oscillators
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 110
112. Ujt relaxation oscillator
• The pulse signal required to drive the digital circuits can be obtained from a single
stage oscillator circuits using a particular device like unijunction transistor.
• Such a oscillator which uses UJT is called UJT relaxation oscillator. The basic circuit
of UJT relaxation oscillator is shown in the Fig.
• The R1 and R2 are biasing resistanceswhich are selected such that they are lower
than interbase resistancesRB1 and RB2.
• The resistanceRT and the capacitance CT decide the oscillating rate. The value of
RT is so selected that the operating point of UJT remains in the negative resistance
region.
• The UJT characteristics and the negative resistance region of the characteristics
are shown in the Fig. The characteristics of UJT show the variation between V and
I where VE is emitter voltage and IE is emitter current.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 112
113. OPERATION
• Capacitor CT gets charged through the resistance RT towards supply
voltage VBB As long as the capacitor voltage is less than peak voltage Vp
the emitter appears as an open circuit.
• When the capacitor voltage Vc exceeds the voltage Vp the UJT fires. The
capacitor starts discharging through R1 +RB1 where RB1 internal base
resistance. As RB1 is assumed negligible and hence capacitor discharges
through R1.
• Due to the design of R1 this discharge is very fast, and it produces a pulse
across R1 When the capacitor voltage falls below Vv i.e. VC = VE= VV the
UJT gets turned OFF. The capacitor starts charging again.
• The discharge time of the pulse is controlled by the time constant CTR1
while the charging time constant by RTCT.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 113
115. advantages of Unijunction
Transistor
• low cost
• negative resistance characteristics
• Requires low value of triggering current.
• A stable triggering voltage
• Low power absorbing device
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 115
116. INTRODUCTION TO IGBT
• The IGBT (insulated-gate bipolar transistor) combines features
from both the MOSFET and the BJT that make it useful in high-
voltage and high-current switching applications.
• The IGBT has largely replaced the MOSFET and the BJT in many
of these applications.
• The IGBT is a device that has the output conduction
characteristics of a BJT but is voltage controlled like a MOSFET; it
is an excellent choice for many high-voltage switching
applications.
• The IGBT has three terminals: gate, collector, and emitter.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 116
118. IGBT FEATURES
• The IGBT has MOSFET input characteristics and BJT output
characteristics. BJTs are capable of higher currents than FETs, but
MOSFETs have no gate current because of the insulated gate structure.
• IGBTs exhibit a lower saturation voltage than MOSFETs and have about
the same saturation voltage as BJTs.
• IGBTs are superior to MOSFETs in some applications because they can
handle high collector-to-emitter voltages exceeding 200 V and exhibit
less saturation voltage when they are in the on state.
• IGBTs are superior to BJTs in some applications because they can switch
faster.
• In terms of switching speed, MOSFETs switch fastest, then IGBTs,
followed by BJTs, which are slowest.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 118
120. IGBT EQUIVALENT CIRCUIT
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 120
•The IGBT is controlled by the gate
voltage just like a MOSFET.
•Essentially, an IGBT can be
thought of as a voltage-controlled
BJT, but with faster switching
speeds. Because it is controlled by
voltage on the insulated gate, the
IGBT has essentially no input
current and does not load the
driving source.
121. OPERATION OF IGBT
• A simplified equivalent circuit for an IGBT is shown in Figure. The
input element is a MOSFET, and the output element is a bipolar
transistor. When the gate voltage with respect to the emitter is less
than a threshold voltage, Vthresh, the device is turned off.
• The device is turned on by increasing the gate voltage to a value
exceeding the threshold voltage.
• The npnp structure of the IGBT forms a parasitic transistor and an
inherent parasitic resistance within the device, as shown in red .
• These parasitic components have no effect during normal
operation. However, if the maximum collector current is exceeded
under certain conditions, the parasitic transistor, Qp can turn on. If
Qp turns on, it effectively combines with Q1 to form a parasitic
element, as shown in Figure , in which a latchup condition can
occur.
• In latch-up, the device will stayon and cannot be controlled by the
gate voltage. Latch-up can be avoided by always operating within
the specified limits of the device.
08-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 121
124. DAY 4
Thyristor family and their
application in industry
E.ELAKKIA,
ASSISTANTPROFESSOR/EEE,
R.M.K.ENGINEERING COLLEGE
10-Jul-20 124E.ELAKKIA/AP/EEE/RMKEC
Webinar series on INTRODUCTION TO SEMICONDUCTOR DEVICES
128. INTRODUCTION
Thyristor is the most important type of power
semiconductor devices.
They are extensively used in power electronic circuits.
They are operated as bi-stable switches from non-
conducting to conducting state.
A Thyristor is a four layer, semiconductor of p-n-p-n structure
with three p-n junctions. It has three terminals, the anode,
cathode and the gate.
The word Thyristor is coined from Thyratron and transistor. It
was invented in the year 1957 at Bell Labs.
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 128
129. SILICON COTROLLED RECTIFIER
The silicon-controlled rectifier or semiconductor controlled rectifier is a
two-state device used for efficient power control.
SCR is the parent member of the thyristor family and is used in
high- power electronics.
The SCR is a four-layer structure, either p–n–p–n or n–p–n–p, that
effectively blocks current through two terminals until it is turned ON
by a small-signal at a third terminal.
The SCR has two states: a high-current low-impedance ON state and a
low-current high-impedance OFF state.
The basic transistor action in a four-layer p–n–p–n structure is
analyzed first with only two terminals, and then the third control input
is introduced.
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 129
130. SCR CONSTRUCTION
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 130
An SCR (silicon-controlled rectifier) is a 4-layer
pnpn device similar to the 4-layer diode except
with three terminals: anode, cathode, and gate.
The basic structure and the schematic symbol of
an SCR is shown in Fig
131. When the anode is made positive with respect the
cathode junctions j1 and j3 are forward biased and
junction j2 is reverse biased.
With anode to cathode voltage being small, only
leakage current flows through the device. The SCR
is then said to be in the forward blocking state.
If VAK is further increased to a large value, the
reverse biased junction will breakdown due to
avalanche effect resulting in a large current
through the device.
The voltage at which this phenomenon occurs is
called the forward breakdown voltage
(VBO)
Once the SCR is switched on, the voltage drop
across it is very small, typically 1 to 1.5V.
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 131
132. SCR EQUIVALENT CIRCUIT
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 132
Like the 4-layer diode operation, the SCR
operation can best be understood by thinking of
its internal pnpn structure as a two-transistor
arrangement, as shown in Figure .
This structure is like that of the 4-layer diode
except for the gate connection.
The upper pnp layers act as a transistor, , and
the lower npn layers act as a transistor, . Again,
notice that the two middle layers are “shared.”
133. TURNING ON THE SCR
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 133
135. There are two different states in which we can examine the SCR in the
forward- biased condition:
(i) The high- impedance or forward-blocking state
(ii) The low-impedance or forward-conducting state
At a critical peak forward voltage Vp, the SCR switches from the blocking
state to the conducting state, as shown fig.
A positive voltage places junction j1 and j3 under forward-bias, and the
centre junction j2 under reverse-bias.
The forward voltage in the blocking state appears across the reverse-biased
junction j2 as the applied voltage V is increased. The voltage from the anode
A to cathode C, as shown in Fig. , is very small after switching to the forward-
conducting state, and all three junctions are forward-biased. The junction j2
switches from reverse-bias to forward-bias..
136. In the reverse-blocking state the junctions j1 and j3 are reverse-
biased, and j2 is forward-biased.
The supply of electrons and holes to junction j2 is restricted, and due to
the thermal generation of electron–hole pairs near junctions j1 and j2 the device
current is a small saturation current.
In the reverse blocking condition the current remains small until
avalanche breakdown occurs at a large reverse-bias of several thousand volts.
An SCR p–n–p–n structure is equivalent to one p–n–p transistor and
one n–p–n transistor sharing some common terminals.
137. 10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 137
LATCHING CURRENT (IL)
After the SCR has switched on, there is a
minimum current required to sustain
conduction even if the gate supply is
removed. This current is called the latching
current. associated with turn on and is
usually greater than holding current.
HOLDING CURRENT (IH)
After an SCR has been switched to the on
state a certain minimum value of anode
current is required to maintain the Thyristor
in ON state. If the anode current is reduced
below the critical holding current value, the
Thyristor cannot maintain the current
through it and turns OFF.
142. TURN ON PROCESS
• Thyristor is turned ON by increasing the Anode
current, this can be accomplished by one of the
following ways
Thermal Turn on or High Temperature Triggering
Light Triggering
High Voltage Triggering
dv/dt Triggering
Gate Triggering
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 142
144. APPLICATIONS OF SCR
• Motor speed control
• Light dimming control
• Heater control
• Phase control
• Battery charger
• Inverters
• Static switches
• Relay control
• Rectifier power supply
10-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 144
145. Few SCRs have two gate leads,
G2 attached to p2 and G1
attached to n1, as shown in Fig
This configuration is called the
semiconductor-controlled
switch (SCS).
The SCS, biased in the forward-
blocking state, can be switched to the
conducting state by a negative pulse
at the anode gate n1 or by a positive
current pulse applied to the cathode
gate at p2.
146. The SCR is the most important member of the thyristor family. The SCR is
a capable power device as it can handle thousands of amperes and volts.
Generally the SCR is used in many applications such as in high
power electronics, switches, power-control and conversion mode.
It is also used as surge protector.
Static Switch: The SCR is used as a switch for power-switching in
various control circuits.
Power Control: Since the SCR can be turned on externally, it can be used
to regulate the amount of power delivered to a load.
Surge Protection: In an SCR circuit, when the voltage rises beyond the
threshold value, the SCR is turned on to dissipate the charge or voltage
quickly.
Power Conversion: The SCR is also used for high-power conversion and
regulation. This includes conversion of power source from ac to ac, ac to dc
and
147. The term TRIAC is derived by combining the first three letters of the
word “TRIODE” and the word “AC”.
A TRIAC is capable of conducting in both the directions. The TRIAC, is
thus, a bidirectional thyristor with three terminals. It is widely used for the
control of power in ac circuits.
148. Depending upon the polarity of the gate pulse and the biasing
conditions, the main four-layer structure that turns ON by a
regenerative process could be one of p1 n1, p2 n2, p1 n1 p2 n3,
or p2 n1 p1 n4, as shown in Fig. 8-8.
149. The TRIAC has the following advantages:
(i) They can be triggered with positive- or negative-polarity
voltage.
(ii)They need a single heat sink of slightly larger size.
(iii)They need a single fuse for protection, which simplifies their
construction.
(iv)In some dc applications, the SCR has to be connected with a
parallel diode for protection against reverse voltage, whereas a
TRIAC may work without a diode, as safe breakdown in either
direction is possible.
150. The TRIAC has the following disadvantages:
(i) TRIACs have low dv/dt ratings compared to SCRs.
(ii) Since TRIACs can be triggered in either direction, the trigger circuits
with
The TRIAC as a bidirectional thyristor has various applications. Some of the
popular applications of the
TRIAC are as follows:
(i) In speed control of single-phase ac series or universal motors.
(ii) In food mixers and portable drills.
(iii) In lamp dimming and heating control.
(iv) In zero-voltage switched ac relay.
151. The DIAC is a combination of two diodes. Diodes being
unidirectional devices, conduct current only in one direction.
If bidirectional (ac) operation is desired, two Shockley diodes may be
joined in parallel facing different directions to form the DIAC.
152. The construction of DIAC looks like a transistor but there are major differences.
They are as follows:
(i)All the three layers, p–n–p or n–p–n, are equally doped in the DIAC,
whereas in the BJT there is a gradation of doping. The emitter is highly doped,
the collector is lightly doped, and the base is moderately doped.
(ii) The DIAC is a two-terminal diode as opposed to the BJT, which is a
three- terminal device.
153. The main characteristics are of the DIAC are as follows:
(i) Break over voltage
(ii) Voltage symmetry
(iii) Break-back voltage
(iv) Break over current
(v) Lower power dissipation
Although most DIACs have symmetric switching voltages,
asymmetric DIACs are also available. Typical DIACs have a power
dissipations ranging from 1/2 to 1 watt.
154. DAY 5
Significance of Biasing- BJT and FET
E.ELAKKIA,
ASSISTANTPROFESSOR/EEE,
R.M.K.ENGINEERING COLLEGE
11-Jul-20 154E.ELAKKIA/AP/EEE/RMKEC
Webinar series on INTRODUCTION TO SEMICONDUCTOR DEVICES
155. TRANSISTOR BIASING CIRCUITS
11-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 155
The term biasing is used for application of dc voltages to establish a fixed
level of current and voltage.
The purpose of biasing a circuit is to establish a proper stable dc operating
point (Q-point). The dc operating point between saturation and cutoff is called
the Q-point. The goal is to set the Q-point such that that it does not go into
saturation or cutoff when an ac signal is applied.
Transistor must be properly biased with dc voltage to operate as a linear
amplifier.
156. TRANSISTOR BIASING CIRCUITS
11-Jul-20 E.ELAKKIA/AP/EEE/RMKEC 156
If amplifier is not biased with correct dc voltages on input and output, it can
go into saturation or cutoff when the input signal applied.
There are several methods to establish DC operating point.
some of the methods used for biasing transistors.
base-bias circuits
voltage-divider bias circuits
emitter-bias circuits
collector-feedback bias circuits
178. Emitter bias.
R C
R
R E
B
IC
IE
IB
Q 1
In p u t
O u t p u t
+ V C
C
-V E E
11-Jul-20 178E.ELAKKIA/AP/EEE/RMKEC
179. Emitter-bias characteristics -1
R C
R E
R B
IC
IE
IB
Q 1
In p u
t
O u t p u
t
+ V C C
-V E E
Circuit recognition: A split (dual-polairty)power
supply and the base resistor is connected to
ground
.
Advantage: The circuit Q-point values are
stable against changes in hFE.
Disadvantage: Requires the use of dual-polarity
power supply.
Applications: Used primarily to bias linear
amplifiers
.
11-Jul-20 179E.ELAKKIA/AP/EEE/RMKEC
182. Collector-Feedback Characteristics (1)
R B
R C
+ V C
C
IC
IE
IB
Circuit recognition: The base resistor
is connected between the base and
the collector terminals of the transistor.
Advantage: A simple circuit withrelatively
stable Q-point.
Disadvantage: Relatively poor
ac characteristics.
Applications: Used primarily to bias linear
amplifiers
.
11-Jul-20 182E.ELAKKIA/AP/EEE/RMKEC
186. Emitter-Feedback Characteristics -1
Circuit recognition: Similar to voltage
divider bias with R2 missing (or base
biaswith RE added).
Advantage: A simple circuit withrelatively
stable Q-point.
Disadvantage: Requires more
components than collector-feedbackbias.
Applications: Used primarily to bias linear
amplifiers.
R B R C
+ V C C
R E
IB
IE
IC
11-Jul-20 186E.ELAKKIA/AP/EEE/RMKEC