SlideShare a Scribd company logo
1 of 11
BY NIKHIL KUMAR
NIRT BHOPAL
Memory Segmentation
Segmentation
* It is the process in
which the main memory
of computer is divided
into different segments
and each segment has
its own base address.
* Segmentation is used
to increase the
execution speed of
computer system so
that processor can able
to fetch and execute the
data from memory
easily and fastly.
Segmentation
Segmentation in 8086
The size of address bus of 8086 is 20 and is able to
address 1 Mbytes ( ) of physical memory.
The compete 1 Mbytes memory can be divided
into 16 segments, each of 64 Kbytes size.
The addresses of the segment may be assigned as
0000H to F000H respectively.
The offset values are from 0000H to FFFFFH.
Types of Segmentation
overlapping
segment.
• A segment starts at a particular address and its maximum size can
go up to 64 Kbytes. But if another segment starts along this 64
Kbytes location of the first segment, the two segments are said to
be overlapping segment.
• The area of memory from the start of the second segment to the
possible end of the first segment is called as overlapped segment.
Non Overlapped
Segment
• A segment starts at a particular address and its maximum size can
go up to 64 Kbytes. But if another segment starts before this 64
Kbytes location of the first segment, the two segments are said to
be Non- overlapping segment.
Advantages of segmentation
The main advantages of the
segmented memory scheme are
as follows:
Allows the memory capacity to
be 1 Mbyte although the actual
addresses to be handled are of
16-bit size
Allows the placing of code data
and stack portions of the same
program in different parts
(segments) of memory, for data
and code protection.
Permits a program and/ or its
data to be put into different
areas of memory each time
program is executed, ie,
provision for relocation may be
done.
Memory Address Generation
• The BIU has a dedicated adder for determining
physical memory addresses.
Physical Address (20 Bits)
Adder
Segment Register (16 bits) 0 0 0 0
Offset Value (16 bits)
Segment : Offset Address
• Logical Address is specified as segment: offset
• Physical address is obtained by shifting the
segment address 4 bits to the left and adding the
offset address.
• Thus the physical address of the logical address
A4FB:4872 is:
A4FB0
+ 4872
A9822
Segments, Segment Registers & Offset
Registers
Segment Size = 64KB
Maximum number of segments possible = 14
Logical Address – 16 bits
Physical Address – 20 bits
2 Logical Addresses for each Segments.
• Base Address (16 bits)
• Offset Address (16 bits)
Segment registers are used to store the Base address of the segment.
Segments, Segment Registers & Offset
Registers
4 Segments in
8086
• Code Segment (CS)
• Data Segment (DS)
• Stack Segment (SS)
• Extra Segment (ES)
Segmented Memory Representation

More Related Content

What's hot

Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
aviban
 
Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor  Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor
Mustapha Fatty
 

What's hot (20)

80286 microprocessor
80286 microprocessor80286 microprocessor
80286 microprocessor
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
 
8086 pin details
8086 pin details8086 pin details
8086 pin details
 
8259 Programmable Interrupt Controller
8259 Programmable Interrupt Controller8259 Programmable Interrupt Controller
8259 Programmable Interrupt Controller
 
8086 microprocessor-architecture
8086 microprocessor-architecture8086 microprocessor-architecture
8086 microprocessor-architecture
 
Types of instructions
Types of instructionsTypes of instructions
Types of instructions
 
8086
80868086
8086
 
Microprocessor 8086
Microprocessor 8086Microprocessor 8086
Microprocessor 8086
 
Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor  Architecture of 8086 Microprocessor
Architecture of 8086 Microprocessor
 
Architecture of 80286 microprocessor
Architecture of 80286 microprocessorArchitecture of 80286 microprocessor
Architecture of 80286 microprocessor
 
Register Organization of 80386
Register Organization of 80386Register Organization of 80386
Register Organization of 80386
 
80486 microprocessor
80486 microprocessor80486 microprocessor
80486 microprocessor
 
8086 micro processor
8086 micro processor8086 micro processor
8086 micro processor
 
ADDRESSING MODES
ADDRESSING MODESADDRESSING MODES
ADDRESSING MODES
 
DMA operation
DMA operationDMA operation
DMA operation
 
8255 PPI
8255 PPI8255 PPI
8255 PPI
 
Memory & I/O interfacing
Memory & I/O  interfacingMemory & I/O  interfacing
Memory & I/O interfacing
 
INTEL 80386 MICROPROCESSOR
INTEL  80386  MICROPROCESSORINTEL  80386  MICROPROCESSOR
INTEL 80386 MICROPROCESSOR
 
Presentation on 8086 Microprocessor
Presentation  on   8086 MicroprocessorPresentation  on   8086 Microprocessor
Presentation on 8086 Microprocessor
 

Similar to Memory Segmentation of 8086

3 organization of intel 8086
3 organization of intel 80863 organization of intel 8086
3 organization of intel 8086
ELIMENG
 
Microprocessor 80386
Microprocessor 80386Microprocessor 80386
Microprocessor 80386
yash sawarkar
 
32- bit Microprocessor-Indtel 80386.pptx
32- bit Microprocessor-Indtel 80386.pptx32- bit Microprocessor-Indtel 80386.pptx
32- bit Microprocessor-Indtel 80386.pptx
Yuvraj994432
 
8086Architecture.pptx
8086Architecture.pptx8086Architecture.pptx
8086Architecture.pptx
backupindrajith
 

Similar to Memory Segmentation of 8086 (20)

Presentataion
Presentataion Presentataion
Presentataion
 
3 organization of intel 8086
3 organization of intel 80863 organization of intel 8086
3 organization of intel 8086
 
Intel 8086 microprocessor
Intel 8086 microprocessorIntel 8086 microprocessor
Intel 8086 microprocessor
 
Architecture_of_80386_Microprocessor - Inroduction
Architecture_of_80386_Microprocessor - InroductionArchitecture_of_80386_Microprocessor - Inroduction
Architecture_of_80386_Microprocessor - Inroduction
 
80386.pptx
80386.pptx80386.pptx
80386.pptx
 
Microprocessor 80386
Microprocessor 80386Microprocessor 80386
Microprocessor 80386
 
80386
8038680386
80386
 
32- bit Microprocessor-Indtel 80386.pptx
32- bit Microprocessor-Indtel 80386.pptx32- bit Microprocessor-Indtel 80386.pptx
32- bit Microprocessor-Indtel 80386.pptx
 
8086Architecture.pptx
8086Architecture.pptx8086Architecture.pptx
8086Architecture.pptx
 
Mpi chapter 2
Mpi chapter 2Mpi chapter 2
Mpi chapter 2
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
Architecture of 80386(www.munnuz.co.cc)
Architecture of 80386(www.munnuz.co.cc)Architecture of 80386(www.munnuz.co.cc)
Architecture of 80386(www.munnuz.co.cc)
 
Presentation on 8086 microprocessor
Presentation on 8086 microprocessorPresentation on 8086 microprocessor
Presentation on 8086 microprocessor
 
EC 8691 Microprocessor and Microcontroller.pptx
EC 8691 Microprocessor and Microcontroller.pptxEC 8691 Microprocessor and Microcontroller.pptx
EC 8691 Microprocessor and Microcontroller.pptx
 
8086 archi notes final
8086 archi notes final8086 archi notes final
8086 archi notes final
 
8086 archi notes final
8086 archi notes final8086 archi notes final
8086 archi notes final
 
Architecture_of_80386_Micropro-An Introduction
Architecture_of_80386_Micropro-An IntroductionArchitecture_of_80386_Micropro-An Introduction
Architecture_of_80386_Micropro-An Introduction
 
MPMC.pptx
MPMC.pptxMPMC.pptx
MPMC.pptx
 
Lect 8 updated (1)
Lect 8 updated (1)Lect 8 updated (1)
Lect 8 updated (1)
 
memory organi.pptx
memory organi.pptxmemory organi.pptx
memory organi.pptx
 

More from Nikhil Kumar

Optical Fiber Communication
Optical Fiber Communication Optical Fiber Communication
Optical Fiber Communication
Nikhil Kumar
 
Mode of Communication - Voice and Data
Mode of Communication - Voice and DataMode of Communication - Voice and Data
Mode of Communication - Voice and Data
Nikhil Kumar
 
Computer System Specification - 4th Generation
Computer System Specification - 4th GenerationComputer System Specification - 4th Generation
Computer System Specification - 4th Generation
Nikhil Kumar
 
Register Organisation of 8086 Microprocessor
Register Organisation of 8086 MicroprocessorRegister Organisation of 8086 Microprocessor
Register Organisation of 8086 Microprocessor
Nikhil Kumar
 
Register Organisation of 8086 Microprocessor
Register Organisation of 8086 MicroprocessorRegister Organisation of 8086 Microprocessor
Register Organisation of 8086 Microprocessor
Nikhil Kumar
 
Minimum Modes and Maximum Modes of 8086 Microprocessor
Minimum Modes and Maximum Modes of 8086 MicroprocessorMinimum Modes and Maximum Modes of 8086 Microprocessor
Minimum Modes and Maximum Modes of 8086 Microprocessor
Nikhil Kumar
 
Architecture of 8086
Architecture of 8086Architecture of 8086
Architecture of 8086
Nikhil Kumar
 

More from Nikhil Kumar (17)

At the Age of 22
At the Age of 22At the Age of 22
At the Age of 22
 
GSM CDMA & WI-MAX
GSM CDMA & WI-MAXGSM CDMA & WI-MAX
GSM CDMA & WI-MAX
 
Integrated Circuit Manufacturing
Integrated Circuit ManufacturingIntegrated Circuit Manufacturing
Integrated Circuit Manufacturing
 
Bsnl training
Bsnl trainingBsnl training
Bsnl training
 
Curved Wavelet Transform For Image Denoising using MATLAB.
Curved Wavelet Transform For Image Denoising using MATLAB.Curved Wavelet Transform For Image Denoising using MATLAB.
Curved Wavelet Transform For Image Denoising using MATLAB.
 
Bsnl Training Report
Bsnl Training ReportBsnl Training Report
Bsnl Training Report
 
Silicon Controlled Rectifier
Silicon Controlled Rectifier Silicon Controlled Rectifier
Silicon Controlled Rectifier
 
Optical Fiber Communication
Optical Fiber Communication Optical Fiber Communication
Optical Fiber Communication
 
Mode of Communication - Voice and Data
Mode of Communication - Voice and DataMode of Communication - Voice and Data
Mode of Communication - Voice and Data
 
Computer System Specification - 4th Generation
Computer System Specification - 4th GenerationComputer System Specification - 4th Generation
Computer System Specification - 4th Generation
 
Virtual Private Network- VPN
Virtual Private Network- VPNVirtual Private Network- VPN
Virtual Private Network- VPN
 
PIN Specification of 8086 Microprocessor
PIN Specification of 8086 MicroprocessorPIN Specification of 8086 Microprocessor
PIN Specification of 8086 Microprocessor
 
PIN Specification of 8086 Microprocessor
PIN Specification of 8086 MicroprocessorPIN Specification of 8086 Microprocessor
PIN Specification of 8086 Microprocessor
 
Register Organisation of 8086 Microprocessor
Register Organisation of 8086 MicroprocessorRegister Organisation of 8086 Microprocessor
Register Organisation of 8086 Microprocessor
 
Register Organisation of 8086 Microprocessor
Register Organisation of 8086 MicroprocessorRegister Organisation of 8086 Microprocessor
Register Organisation of 8086 Microprocessor
 
Minimum Modes and Maximum Modes of 8086 Microprocessor
Minimum Modes and Maximum Modes of 8086 MicroprocessorMinimum Modes and Maximum Modes of 8086 Microprocessor
Minimum Modes and Maximum Modes of 8086 Microprocessor
 
Architecture of 8086
Architecture of 8086Architecture of 8086
Architecture of 8086
 

Recently uploaded

Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...
Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...
Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...
Lovely Professional University
 
ONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdf
ONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdfONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdf
ONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdf
Kamal Acharya
 

Recently uploaded (20)

Object Oriented Programming OOP Lab Manual.docx
Object Oriented Programming OOP Lab Manual.docxObject Oriented Programming OOP Lab Manual.docx
Object Oriented Programming OOP Lab Manual.docx
 
RM&IPR M5 notes.pdfResearch Methodolgy & Intellectual Property Rights Series 5
RM&IPR M5 notes.pdfResearch Methodolgy & Intellectual Property Rights Series 5RM&IPR M5 notes.pdfResearch Methodolgy & Intellectual Property Rights Series 5
RM&IPR M5 notes.pdfResearch Methodolgy & Intellectual Property Rights Series 5
 
Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...
Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...
Activity Planning: Objectives, Project Schedule, Network Planning Model. Time...
 
ChatGPT Prompt Engineering for project managers.pdf
ChatGPT Prompt Engineering for project managers.pdfChatGPT Prompt Engineering for project managers.pdf
ChatGPT Prompt Engineering for project managers.pdf
 
Quiz application system project report..pdf
Quiz application system project report..pdfQuiz application system project report..pdf
Quiz application system project report..pdf
 
Natalia Rutkowska - BIM School Course in Kraków
Natalia Rutkowska - BIM School Course in KrakówNatalia Rutkowska - BIM School Course in Kraków
Natalia Rutkowska - BIM School Course in Kraków
 
"United Nations Park" Site Visit Report.
"United Nations Park" Site  Visit Report."United Nations Park" Site  Visit Report.
"United Nations Park" Site Visit Report.
 
KIT-601 Lecture Notes-UNIT-5.pdf Frame Works and Visualization
KIT-601 Lecture Notes-UNIT-5.pdf Frame Works and VisualizationKIT-601 Lecture Notes-UNIT-5.pdf Frame Works and Visualization
KIT-601 Lecture Notes-UNIT-5.pdf Frame Works and Visualization
 
BRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWING
BRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWINGBRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWING
BRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWING
 
Software Engineering - Modelling Concepts + Class Modelling + Building the An...
Software Engineering - Modelling Concepts + Class Modelling + Building the An...Software Engineering - Modelling Concepts + Class Modelling + Building the An...
Software Engineering - Modelling Concepts + Class Modelling + Building the An...
 
ONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdf
ONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdfONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdf
ONLINE VEHICLE RENTAL SYSTEM PROJECT REPORT.pdf
 
Attraction and Repulsion type Moving Iron Instruments.pptx
Attraction and Repulsion type Moving Iron Instruments.pptxAttraction and Repulsion type Moving Iron Instruments.pptx
Attraction and Repulsion type Moving Iron Instruments.pptx
 
solid state electronics ktu module 5 slides
solid state electronics ktu module 5 slidessolid state electronics ktu module 5 slides
solid state electronics ktu module 5 slides
 
Furniture showroom management system project.pdf
Furniture showroom management system project.pdfFurniture showroom management system project.pdf
Furniture showroom management system project.pdf
 
Electrostatic field in a coaxial transmission line
Electrostatic field in a coaxial transmission lineElectrostatic field in a coaxial transmission line
Electrostatic field in a coaxial transmission line
 
Lab Manual Arduino UNO Microcontrollar.docx
Lab Manual Arduino UNO Microcontrollar.docxLab Manual Arduino UNO Microcontrollar.docx
Lab Manual Arduino UNO Microcontrollar.docx
 
E-Commerce Shopping using MERN Stack where different modules are present
E-Commerce Shopping using MERN Stack where different modules are presentE-Commerce Shopping using MERN Stack where different modules are present
E-Commerce Shopping using MERN Stack where different modules are present
 
ROAD CONSTRUCTION PRESENTATION.PPTX.pptx
ROAD CONSTRUCTION PRESENTATION.PPTX.pptxROAD CONSTRUCTION PRESENTATION.PPTX.pptx
ROAD CONSTRUCTION PRESENTATION.PPTX.pptx
 
2024 DevOps Pro Europe - Growing at the edge
2024 DevOps Pro Europe - Growing at the edge2024 DevOps Pro Europe - Growing at the edge
2024 DevOps Pro Europe - Growing at the edge
 
ONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdf
ONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdfONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdf
ONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdf
 

Memory Segmentation of 8086

  • 1. BY NIKHIL KUMAR NIRT BHOPAL Memory Segmentation
  • 2. Segmentation * It is the process in which the main memory of computer is divided into different segments and each segment has its own base address. * Segmentation is used to increase the execution speed of computer system so that processor can able to fetch and execute the data from memory easily and fastly.
  • 4. Segmentation in 8086 The size of address bus of 8086 is 20 and is able to address 1 Mbytes ( ) of physical memory. The compete 1 Mbytes memory can be divided into 16 segments, each of 64 Kbytes size. The addresses of the segment may be assigned as 0000H to F000H respectively. The offset values are from 0000H to FFFFFH.
  • 5. Types of Segmentation overlapping segment. • A segment starts at a particular address and its maximum size can go up to 64 Kbytes. But if another segment starts along this 64 Kbytes location of the first segment, the two segments are said to be overlapping segment. • The area of memory from the start of the second segment to the possible end of the first segment is called as overlapped segment. Non Overlapped Segment • A segment starts at a particular address and its maximum size can go up to 64 Kbytes. But if another segment starts before this 64 Kbytes location of the first segment, the two segments are said to be Non- overlapping segment.
  • 6. Advantages of segmentation The main advantages of the segmented memory scheme are as follows: Allows the memory capacity to be 1 Mbyte although the actual addresses to be handled are of 16-bit size Allows the placing of code data and stack portions of the same program in different parts (segments) of memory, for data and code protection. Permits a program and/ or its data to be put into different areas of memory each time program is executed, ie, provision for relocation may be done.
  • 7. Memory Address Generation • The BIU has a dedicated adder for determining physical memory addresses. Physical Address (20 Bits) Adder Segment Register (16 bits) 0 0 0 0 Offset Value (16 bits)
  • 8. Segment : Offset Address • Logical Address is specified as segment: offset • Physical address is obtained by shifting the segment address 4 bits to the left and adding the offset address. • Thus the physical address of the logical address A4FB:4872 is: A4FB0 + 4872 A9822
  • 9. Segments, Segment Registers & Offset Registers Segment Size = 64KB Maximum number of segments possible = 14 Logical Address – 16 bits Physical Address – 20 bits 2 Logical Addresses for each Segments. • Base Address (16 bits) • Offset Address (16 bits) Segment registers are used to store the Base address of the segment.
  • 10. Segments, Segment Registers & Offset Registers 4 Segments in 8086 • Code Segment (CS) • Data Segment (DS) • Stack Segment (SS) • Extra Segment (ES)