2.5D / 3D TSV & Wafer-Level Stacking: Technology & Market Updates 2019 Report by Yole Developpement

From Technologies to Markets
©2019
2.5D / 3D TSV
& Wafer Level
Stacking Technology
& market updates
2019
Sample

22.5D/3D TSV & Wafer Level Integration Technology & Market updates 2019 | Sample | www.yole.fr | ©2019
TABLE OF CONTENT
Part 1/3
• Report scope & objectives P5
• Glossary P6
• Authors P8
• Companies cited in this report P9
• Comparison with 2017 report version P10
• The three pages report summary P13
• 3D stacking – packaging market repartition: P16
• Per 3D stacking technologiy
• Per segment
• Per market
• Executive summary P21
1. Introduction P58
• Hints for reading
• Updates from the last report
• Terminology
• From global market to advanced stacking technologies
2. High end market segment P72
• Trends P74
• Artificial Intelligence
• Data center
• Super computer
• Cryptocurrency mining
• Gaming
• AR/MR/VR
• Forecasts P95
• Stacked memories wafer, units production
• Stacked memories packaging revenues
• 2.5D interposer wafer, units production
• 2.5D interposer packaging revenues
• 3D SoC wafer production & packaging revenue
• Technologies & roadmaps P109
• TSV
• 3D stacked memories
• 3D SoC
• 3D sequential integration
• Hardware examples, players & supply chain P125
• Hardware for HPC & Networking
• GPU, FPGA supply chain
• TSV based product players
• Conclusions P150

TABLE OF CONTENT
Part 2/3
3. Mid/Low End market segment P152
• CIS P153
• Trends
• CIS market drivers
• CIS packaging evolution
• Forecasts
• CIS market repartition per technology
• Global CIS wafer production
• Stacked CIS wafer, unit production
• Stacked CIS packaging revenue
• Technologies & roadmaps
• CIS stacking technologies:TSV & hybrid bonding
• CIS roadmap
• Hardware examples, players & supply chain
• BSI Stacked TSV
• BSI Stacked Hybrid
• BSI Multi-stack TSV
• Conclusion
• MEMS & sensors P187
• Trends
• Market evolution & packaging trends
• Forecasts
• MEMS & sensors with TSV wafer
& units production
• TSV revenues for MEMS & Sensors
• Hardware examples, players & supply chain
• MEMS & Sensors with TSV examples
• Supply chain for certain MEMS
& sensors applications and players
• Conclusions
• LED P212
• TSV in LED
• TSV in LED wafer & revenue forecasts

TABLE OF CONTENT
Part 3/3
4. Potential future applications for
3D stacking technologies P216
• 3D NAND
• Stacked memories, 3D SoC & displays
4. Appendix P219
• Stacking technologies vs 2.5DTSV interposer
• Details of each technology
5. AboutYole Développement P245

REPORT SCOPE & OBJECTIVES
• This report is an update of the previous 2017 release “3D TSV and 2.5D business update: Market and Technology trends
2017”
• The scope of this report is to present the actual trends and their impact on the packaging need and especially the 2.5D/3D
stacking technologies. Mega trends are pushing the packaging market into more and more stacking technologies in order to
answer their stringent requirements (more performance, lower consumption & footprint). Already established stacking
technologies like TSV will continue to flourish, but will have extended challengers as OSAT’s and other players are also
innovating and proposing alternative technologies & solutions for devices stacking
• This report objectives are to:
• Show the impact of the semiconductor market mutation on packaging technologies
• Outline three stacking technologies, through silicon via (TSV), 3D system on chip & hybrid bonding
• Provide an overview of the markets requiring stacking technologies
• Update market data & forecasts for stacking technologies
• Describe the hardware & key applications that are/will use stacking technologies
• Identify the main players & supply chain for stacking technologies
• Evoke novice technologies that may challenge some of the actual stacking technologies
• Predict future applications where stacking technologies may be needed

Biographie & contact
ABOUT THE AUTHOR
Mario Ibrahim
As a Technology & Market Analyst, advanced packaging, Mario Ibrahim is a member of the Semiconductor & Software division at Yole
Développement (Yole). Mario is engaged in the development of technology & market reports as well as the production of custom consulting studies.
He is also deeply involved in test activities business development within the division.
Prior to Yole, Mario was engaged in test activities development on LEDs at Aledia. He was also in charge of several R&D advanced packaging programs.
During his five-year stay, he developed strong technical & managerial expertise in different semiconductor fields.
Mario holds an Electronics Engineering Degree from Polytech’ Grenoble (France). He apprenticed for three years in the Imaging division of
STMicroelectronics Grenoble, where he contributed to the test benches park automation within the test & validation team.
Contact: ibrahim@yole.fr

7
Alchip, Aledia, Alibaba, Amazon, AMD, Amkor, AMS, ANPEC, Apple, ASE, ASUS, Atos, Audi, Avago,
Baidu, Bosch, Bitmain, BitFury, Broadcom
Canaan, Carsem, Cisco, Cray
DARPA
EBANG, EMmicroelectronic, EPworks
Facebook, Faraday, Fingerprints, Foxconn, Fraunhofer, Fujitsu
Gigabyte, Global Foundries, Google, GUC
HalongMining, HLMC, HP, Huatian, Huawei
Ibiden, IBM, Icsens, IMEC, Inari technology, Infineon, Innosilicon, Intel, InvenSense
JCET STATS ChipPAC,Juniper
Lenovo, Leti, Lfoundry, LGinnotek
mCube, Melexis, Memsic, Mercedes-Benz, Micralyne, Micron, Microsoft
NEC, Nokia, Nvidia, NXP
Omnivision, ON Semiconductor, OpenSilicon,Osram
PTI
Samsung, SensL, Shinko, SK hynix, SMIC, Sony, SPIL, STMicroelectronics
Tencent,TF,Toshiba,TPK,TSMC
UMC, Unimicron
Xfab, Xilinx, Xintek, XMC, Xperi
YMTC
COMPANIES CITED IN THIS REPORT

TSV TECHNOLOGY WAFER START & REVENUES
GlobalTSV market

The numbers are based on each technology’s revenues (M$), meaning that 30% of margin is taken into consideration
ADVANCED PACKAGING TECHNOLOGIES REVENUES REPARTITION
Repartition per markets : HPC & Networking / Consumer / Automotive / Others
• HPC & networking markets are going to grow fast in order to follow the AI & big data trends. This market added to consumer market will
represent almost 90% of the advanced packaging (stacking) market
• Stacking technologies will be needed for autonomous vehicles where higher computing performance will be required (edge computing), but
attention to automotive stringent regulations in term of reliability
• Medical market is a small one forTSV’s but where the performance and form factor parameters are becoming more and more important

WHAT’S NEW SINCE THE LAST REPORT (JUNE 2017)
• Updating the hardware list using TSV & other 3D stacking technologies with focus on GPUs for High Performance Computing (HPC) in
addition to MEMS & Sensors for mid / low end market segment
• Updating the 3D integration markets by adding cryptocurrency as a new market
• Updating the 3D stacked memory market by omitting HMC & MCDRAM memories from it. Micron stopped any R&D program related to
HMC, they will continue to produce low volumes for some of their clients and they are switching to HBM instead
• Updating the 3D integration technologies and adding technologies like hybrid bonding, Foveros, RDL interposer as a new stacking solutions.
• Updating the CIS market and segmenting it into 3 different stacked CIS technologies (using TSV / Hybrid and combo TSV +Hybrid). More focus
on this market asYole is foreseeing important usage of stacking technologies in it
• Updating the 2017 forecasts with numbers based on the actual & future market analysis & trends
• Updating the players & ecosystem for stacking technologies, showing that it’s in place and ready to fulfill clients demands
• Updating the cost structure calculation used for the forecasts:
• 2017 report: the cost of packaging was including for example the DRAM wafer cost + TSV cost + bumping cost +yield loss cost
• 2019 report: the cost of packaging is only and for example the TSV cost + bumping cost + yield loss cost. Not taking into consideration the device wafer
cost as we want to focus on the packaging costs only
• New forecasts on Intel’s Foveros technology & updating the 3D SoC forecasts
• 3D SoC will hit the market by 2019 produced byTSMC and with HiSilicon as a first potential client for their datacenter activities
• EMIB from Intel as 3D stacking alternative to 2.5DTSV interposer, with products already launched
• DRAM is still and will further be a big playing ground for 3D stacking technologies. Samsung is prompting pre-emptive $27.7 billion in a 2nd
plant in Pyeongtaek to be able to answer growing DRAM & NAND demand. On the other hand, Micron will also invest $3 billion by 2023 to
increase memory production at its Manassas plant
• Chinese government is massively backing their memory startups. YMTC (Tsinghua Unigroup) received $24 billion to implement a new 12” 3D
NAND production line in the new plant in Chengdu. Tsinghua Unigroup are also investing $30 billion in a plant in Nanjing to manufacture 3D
NAND & DRAM
• TSMC CoWoS and advanced packaging production capacity extension up to 200K wafers/month. Wafer on Wafer (3D SoC with hybrid
bonding) new platform fromTSMC for HPC and data center markets

WHY 3D INTEGRATION IS BECOMING MORE AND MORE IMPORTANT
Moore’s law slowing down
Moore’s law pace is slowing down, if not already dead as mentioned by Forbes & Nvidia. It’s reaching some limitations as developing lower technology
nodes is doable technically but not anymore cost efficient
In this report, we will be using the “slow down” term when describing Moore’s law status
To deal with this slow down, other alternatives are currently used & will be further developed:
• Advanced packaging technologies development. 2.5D technology was first used in high performance applications. Scaling the Z axis is taking
more and more importance in what is called 3D stacking especially for HPC, but not only
• Specialized devices. Meaning 1 device = 1 function. Example of GPU VS Neural engine, that allows reduced power consumption & faster
computing speed
• Other advanced packaging technologies development (SLIT, FOCoS, SWIFT, EMIB, ...)
Only 4 players with 14/12nm Fab
(2017) Only 2-3 players still in the 7nm node race
7nm Fab
Delay in Intel’s
10nm node, so
obviously they are
late regarding
TSMC & Samsung

MEGA TRENDS
Opportunity for various stacking advanced packaging
CPU /GPU APU MCUs ASICs FPGAs Memory
Sensors/
Actuators/CIS
Analog /
Discretes
Opto-
electronics
AI/ML
FC, 2.5D/3D,
FO, SiP
FC, FO,ED
FC, FO
FC, 2.5D/3D,
FO
FC, 3D,
WB,QFN,
WLCSP
Smart automotive
/Electrification/ ADAS
FC,
WB,QFN,
WLCSP
FC,FO,WB, QFN,
WLCSP, SiP, 3D
FC,WB,FO,
QFN, ED,
SiP
AR/VR
HPC
FC, 2.5D/3D,
FO
SiP, 2.5D/3D,
FC,WB
IoT
FC,
WB,QFN,
WLCSP
FC,FO,WB, QFN,
WLCSP, SiP, 3D
FC,WB,FO,
QFN, ED,
SiP
5G
FC, 2.5D/3D,
FO, SiP FC, FO,ED SiP, 2.5D/3D,
FC,WB
Mobile 3D
FC,FO,WB, QFN,
WLCSP, SiP, 3D
Blockchain / Cryptocurrency
FC, 2.5D/3D,
FO
FC, 2.5D/3D,
FO
FC,WB,FO,
QFN, ED,
SiP
Where 2.5D/3D stacking technologies are used

In this report
ADVANCED PACKAGING PLATFORMS
Focus on 3D stacking packaging platforms in this report
No
substrate
Fan-Out WLCSP
Organic
substrates
Wirebond
BGA CSP
COB
BOC
WB CSP
LGA
Flip-Chip
BGA
FC BGA
FO on
Substrate
2.5/2.1D
3D*
CSP LGA
Leadframe
substrates
Wire Bond
QFN/QFP
SOIC
TSOP
LCC
DIP
Flip Chip
FC QFN
(MIS)
Ceramic
substrates
Wirebond
Hi Rel
Flip-Chip
HTCC
LTCC
Embedded
Die
*Hybrid bonding is included in 3D platform

2.5D & 3D
integration
High End
segment
HPC
Artificial
Intelligence
Data mining
(crypto &
other data)
Super
computers
Data centers,
hyper scale
Networking
Switch /
Router
Gaming,
VR/AR/MR
Mid / Low
End segment
Sensing
MEMS &
sensors
CIS
Lighting
LED
2.5D & 3D INTEGRATION MARKET SEGMENTATION
The market is divided into High End & Mid/Low segments
High End segment is defined as the market where an application is less
sensitive to the cost, but requires reduced footprint in addition to high
performances & reliability
Mid/Low End segment is defined by a
good balance between cost sensitivity &
performances
Segments
Market
Applications

2.5D & 3D STACKING TECHNOLOGIES
With /WithoutTSV. FoundriesVS OSATs battle
i-THOP FC-EIC
Embeddedin
substrate
EMIB
Hybrid Bonding
WithOr
WithoutTSV
3D SoC
TSV+Hybrid
Bonding
WithTSV
WithoutTSV
G-ALCS
TGV
3D Stacked memory
TSV

2.5D INTEGRATION WITH TSV TECHNOLOGY FOR HIGH END SEGMENT
Heterogeneous integration on Si interposer
• The TSV is used as interconnection between the 2 Si facets in the so called Si interposer. It is a thinned silicon wafer with TSV’s that enable
heterogeneous device integration on top of it in what is described as 2.5D integration.
• This 2.5D Si interposer is the technology created just before the 3D integration (used for example in stacked memories). It was created as an
intermediate technology before accessing the 3D integration and still used in many applications that requires:
• Higher performances and lower power consumption due to shorter connections
• In the example below, the Si interposer is used as an interconnection between a X-PU (GPU for example) and a 3D stacked memory (with TSV’s
inside, HBM for example)
TSV

3D INTEGRATION WITH TSV TECHNOLOGY FOR HIGH END SEGMENT
3D Stacked memories with TSV technologies (3DS & HBM)
• 2 types of stacked memories technologies usingTSV are on the market:
• 3DS: this type of memory is using DDR4 DRAM stacked chips and operate as stand-alone memories for HPC & data centers markets
• HBM: this type of memory is often used beside other hardware like GPU, CPU, FPGA on top of a 2.5D interposer
• The 3DS memories are TSV based devices, where several DDR4 DRAMs are interconnected together using TSV technology. It can have a total
capacity of 64 and 128GB. Samsung announced its availability in 256GB configuration back in October 2018
• 2 major players share the 3DS market, Samsung as a leader, SK Hynix as runner up with micron completing the podium but still far away from the
2 leaders in term of volume production
• The HBM memories are also TSV based devices, where 2/4 & 8 DRAMs are interconnected together via TSV. We can see 1/2/4 HBM devices
around a processor in a system dedicated for HPC. Samsung is the leader in this market with SK Hynix in second position. Micron will switch to
this technology instead of their HMC technology that they are letting down
• In term of market, the 3DS today is around 42% of total high performance stacked memories (3DS & HBM). Due to the fact of data collection
exploded in the last years and the entry of artificial intelligence onto our daily life, the need of 3DS will increase in the upcoming years reaching
51% of the total high performance stacked memories market by 2020
Samsung
stacked
DRAM
(3DS)
Samsung
8 stack
high
HBM2

Approach 1 (IMEC)
Approach 2 (IMEC)
Approach 3 (other possible
approach?)
3D SOC
2 or 3 potential approaches to reach 3D SoC
Source IMEC (except approach 3)
Dielectric bonding +
Si thinning + TSV last
+ bumping
Hybrid bonding + Si thinning
+ TSV middle + bumping
1 2 3?
Potential 3rd approach:
Hybrid or other
bonding + Wafer 1
complete Si removal +
bumping (No TSV)
RDL may still be needed before bumping

3D SOC FORECAST
12’’ SoCWSPY production
• TSMC is believed to be the first to get a product on the market,
by end of 2018, start of 2019 (Die to wafer, memory on logic).
They are able to ramp up the production very quickly if a client
will manifest an interest in this technology
• TSMC WoW technology will be based on SoC wafer stacking
using hybrid bonding and intended for datacenter usage. HiSilicon
(Huawei) can be their first client,AMD is also a potential client
• Global foundries will enter the market by 2021 with as first phase
memory on logic wafer to wafer stacking using hybrid bonding
with pitches between 1 & 2µm. They will produce both wafers &
stack them in-house, which is of an interest for the yield
• Hybrid bonding will, most probably, be the bonding technology
used for 3D SoC stacking (wafer to wafer)
• 3D SoC wafer should cost 3 to 4 times less than TSV interposer
wafer
• 3D SoC can be memory on logic or logic on logic (attention heat
dissipation issues for the latter one). In the case of memory on
logic which is the most probable application for 3D SoC, memory
manufacturers & logic circuits ones should talk together to limit
the design differences & yield losses (the manufacturers having
capabilities to produce both wafers will have a big advantage)

HIGH END HARDWARE USING STACKING TECHNOLOGIES, PRODUCTS LAUNCH

HIGH END MARKET SEGMENT EXAMPLES, PLAYERS & SUPPLY CHAIN

TSV IN HIGH END SEGMENT FORECAST
TSV revenues & growth in High End segment
• This graph is based onTSV revenues in High end segment:
• 3D stacked memory (HBM & 3DS)
• 2.5D interposer (active & passive)
• 2.3B$ TSV revenues by 2023 with an important growth of
57% between 2017-2023 in high end segment
• 3D stacked memories are and will still be the best friend
hardware applications for TSV technology
• We insist, it’s the TSV revenues and growth for High end
segment only. If we plot the growth of TSV for all the
combined market segments, the growth is around 25%

2.5D “PASSIVE” INTERPOSER
A vision on its future
• TSV interposer is an expensive and complex technology in term of process steps
• All the players acting in the field of 2.5D stacking are working on replacing the TSV interposer by other
technologies. The goal is to reduce the prices, enabling the access of 2.5D to mid/low end segments, but also
simply to reduce the total module cost
• Two scenarios are possible forTSV:
• Scenario 1:
On the previous 2 slides, we shown that the demand for TSV interposer will continue to grow till 2020 and starting from
2021 the growth will be slower. This is the first potential scenario where we believe that one of the TSV less technologies
will hit the market by 2020/2021 and will start replacing the TSV interposer for 2.5D gradually
• Scenario 2:
Delays in the development and commercialization of TSV less technology(ies). Meanwhile, the demand for TSV interposer
continue to grow to feed the HPC markets. In this case, the TSV interposer will continue to dominate the 2.5D market
and players like TSMC & UMC will be able to increase their production volumes to meet with the demand
• TSV interposer still have some golden years in front, both scenarios can happen even if scenario 1 is more likely to occur
after 2020 & scenario 2 till 2020

CIS WAFER LEVEL PACKAGING EVOLUTION
From FSI to BSI multi-stackTSV sensors
Used in Iphone
I7+:
2 wafers
interconnected
via TSV
2016
Used in Galaxy
S7:
2 wafers
interconnected
via Hybrid
Bonding
Used in Sony
XZs:
3 wafers
interconnected
via TSV
2016
2017
4 stacks high CIS
& Pixel to pixel
high density
interconnection
CIS under
development.

• Technology shift into stacked CIS driven by the willingness to go for more performances & higher image quality in parallel to
reducing the footprint
• Stacking technologies enabled Rolling Shutter (RS) pixel size reduction. This will also be applied to Global Shutter pixel in the
future
CIS ROADMAP
Stacking technologies enabled new CIS technologies
FSI
FSI SOI
BSI
BSI Stacked TSV
BSI Stacked Hybrid
BSI Multi-stacked TSV
Samsung S6
Apple i7
Samsung S7
Apple i8
Sony XZ
Apple iX
RS pixel
GS pixel ToF pixel
Lenovo 2Pro
Event-based
pixel ?
Technology complexity
2000 2005 2010 2015 2020 2025 Time

CIS STACKED TECHNOLOGIES FURTHER DETAILS [1/2]
TSV and hybrid stacked BSI processes
• BSI stacked TSV:
• Oxyde /oxide permanent bonding
• Via LastTSV process + RDL
• BSI stacked Hybrid:
• Copper pads on both wafers (upper & lower ones)
• Oxide deposition & planarization (very low surface roughness is required ~1nm)
• Plasma activation + alignment (able to go under 1µm of pitch alignment using a stepper) + Room temperature bonding followed by an
annealing cycle

TSVVS HYBRID BONDING FOR CIS
Which technology is the most suited?

STACKED CIS PACKAGING MARKET
Packaging cost & revenues for stacked CIS (M$)

KEY PLAYERS FOR 3D STACKED CIS PRODUCTS
Still a reduced comity with few players

PLAYERS LICENSING XPERI’S HYBRID BONDING TECHNOLOGY
From CIS to memory, more and more players are using/evaluating hybrid bonding

THE DIFFERENT MEMS, SENSORS,AND ACTUATORS,AND WHERETHEY CAN COMBINE
ACTUATORSSENSORS
Pressure
Soundandultra
sonic
Environment Optical sensors
Drugdelivery
Microfluidics
Inkjetheads
Auto-Focus
Micromirrors
RF
µspeakers
Optical MEMS Micro structures
Particles
Humidity
Movement
Gas
Magnetometers
Accelerometers
Gyroscopes
Temperature
Opticalbenches
Microtips
Probes
Watches
components
PIR&thermopiles
Switch
Filter
Bosch BME680
FLIR Lepton One
Infineon microphone
ST pressure sensorInvenSense
MPU9250
Debiotech micro
pump
Texas Instruments DLP
Avago-Broadcom
FBAR Filter
Spiromax Patek
Philippe
AudioPixelsMEMS-basedspeaker
Oscillator
Biochips
poLight AF
SiTime oscillator
ALS,RGB
Fingerprint
Optical combos
“open” package
environmental combos
Possible integration with environment
combos
Possible
integration with
opto combos
Hyperspectral
3Dsensing
FTIR
Vision
Microbolometers
Ultrasonic
fingerprint
Apple dot projector
Qualcommfingerprintsensor
IMUs (6 to 9 DOF)
“closed” package
6 to 9+ DOF
combos
SiPM
Application where TSV is used

TRENDS IN MEMS PACKAGING [2/2]
Packaging trends by market

INTEREST OF WAFER LEVEL PACKAGING + TSV ON ACCELEROMETERS?
WLCSP & TSV = smaller package dimensions
65% surface reduction due to the use of (WLCSP +TSV)VS (LGA + TSV)
25% thickness reduction due to the use of (WLCSP +TSV)VS (LGA + TSV)

TSV FORECASTS FOR MEMS & SENSORS
TSV revenues for MEMS & Sensors

MEMS & SENSOR (EXCEPT CIS) GLOBAL SUPPLY CHAINTHAT USETSV INTHEIR PRODUCTS
Non exhaustive list

RELATED REPORTS

The slowdown of Moore’s law opened the path to
new inventions for answering actual mega-trends’
stringent specifications. In the packaging field, 2.5D
and 3D stacking technologies were preferred by many
semiconductor players, and through silicon via (TSV)
was the initial stacking technology. After several years
ofdevelopmentandafocusonMEMS,itfinallyentered
many applications. Today, 2.5D and 3D stacking
technologies are the only solution that meet the
required performance of applications like AI and data
center as for today. Stacking technologies are used in
a variety of hardware, including 3D stacked memory,
Graphics Processing Unit (GPU), Field-Programmable
Gate Array (FPGA), and CMOS Image Sensor (CIS),
are intended for the high/mid and low-end market
segments.
Hardware like High Bandwidth Memory (HBM) and
CIS comprise the majority of TSV’s revenue. The
overall stacking technologies market will exceed
$5.5B in 2023 with a CAGR of 27%. As for today,
the consumer market is the biggest contributor,
with over 65% market share. But this, paradoxically,
doesn’t mean that consumer is the driver for these
technologies. In reality, HPC is the real driver for
stacking technologies and will exhibit the fastest
growth up to 2023, with market share doubling from
20% in 2018 to 40% in 2023. In terms of packaging
revenue, this equates to a more than 6x increase
from 2018’s revenue. Consequently, the consumer
market’s share will decrease. Other markets like
automotive, medical, and industrial will maintain
their current market share.
2.5D / 3D TSV & WAFER-LEVEL STACKING:
TECHNOLOGY & MARKET UPDATES 2019
Market & Technology report - January 2019
STACKING: ONE ALTERNATIVE FOR HIGH INTEGRATION BESIDE
MOORE’S LAW
2.5D heterogeneous and 3D wafer-level stacking are reshaping the packaging landscape.
WHAT’S NEW
• Two main market segments:
- Highigh-end segment: high-
performance computing,
networking, gaming, and AR/VR/
MR
- Mid/low-end segment: CMOS
Image Sensors (CIS), MEMS,
and LED
• Semiconductor market mutation
and its impact on stacking
technologies
• Through silicon via's (TSV)
extensive usage in HPC and
networking hardware
• 3D System on Chip (SoC)
technology to hit the market by 2019
• Hybrid bonding/stacking
technology: markets, applications,
forecasts, and players
• Stacking technologies forecast for
the CIS market
• Technologies that are challenging
2.5D TSV interposer
KEY FEATURES
• Markets and applications requiring
3D stacking technologies
• High-end market segment:
stacking technologies (TSV, 2.5D
interposer, and 3D SoC), supply
chain and forecasts for HPC,
networking, gaming, and AR/
VR/MR. Breakdown by product
(stacked memory) and technology
(2.5D and 3D SoC)
• Mid/low-end segment:
technologies (TSV and hybrid
bonding), supply chain, and
forecasts for CIS, MEMS,
sensors, and LED. Breakdown by
technology for CIS and LED, and
by application for MEMS sensors
• The future of stacking technologies
(Yole Développement, January 2019)
FROM TSV TO WAFER-LEVEL STACKING, PACKAGING TECHNOLOGIES ARE
FLOURISHING
Since the stacking battle is mostly between TSV-
based and TSV-less technologies, these are the
two categories Yole Développement considers in
this report.
For today’s high-end market segment, the most
popular2.5Dand3Dintegrationtechnologiesonthe
market are based on TSV for 3D stacked memory,
and TSV interposer for heterogeneous stacking.
Chip-on-Wafer-on-Substrate (CoWos) technology
is already widely used for HPC applications, and
new TSV technologies will hit the market in 2019,
i.e. Foveros from Intel, which is based on “active”
TSV interposer and 3D SoC technology, with hybrid
bonding and TSV interconnections (potentially).
The Foveros example shows that although TSV
is being challenged by non-TSV technologies,
companies still have faith in it.
We cannot neglect the emergence of TSV-less
technologies in the market. These innovations
can be placed into two groups: “with substrate”
and “embedded in substrate”. Embedded Multidie
Interconnect Bridge (EMIB) technology, already
commercialized, is part of the embedded-in-
substrate group, where the Si bridge is deep seating
in the substrate. Other substrate technologies are
being developed but are still not on the market, i.e.
Stacking technologies: revenue breakdown per market from 2018 to 2023
$2 722M
CAGR 18%
$452M
CAGR 25%
$2 324M
CAGR 46%
$5 749M
$1 176M
$350M
$150M
$1 758M
2018
2023
*CAGR
+27%
*CAGR: Compound Annual Growth Rate
HPC networking
Consumer
Automotive
Others (industrial and medical)
$81M
$252M
CAGR 25%

2.5D / 3D TSV WAFER-LEVEL STACKING: TECHNOLOGY MARKET UPDATES 2019
TSV-less stacking technologies - 2018 overview
WHO IS BACKING AND CAPITALIZING ON STACKING TECHNOLOGIES?
Different players want their share of the growing
$5.5B stacking market, and four different business
models are today locked in a race to win a piece of
the stacking business: foundries, IDMs, OSATs, and IP
companies.
Foundries like TSMC, UMC, and GlobalFoundries
dominate TSV heterogeneous stacking technologies
due to their ability to produce the interposer in-
house. Intel, with its “Foveros” technology, is the only
IDM trying to compete in this sector. For 3D stacked
memory, the battle is between the “Big 3” IDMs:
Samsung, SK Hynix, and Micron. These companies will
continue to reign over the stacked memory market.
Meanwhile, 3D SoC is a foundry technology, and it
is likely that only one foundry will manufacture it, in
order to ensure high yield and limit risks. Here, TSMC
leads the time-to-market race over GlobalFoundries.
For the TSV-less technologies, the game is a bit
more engaged between foundries, IDMs, OSATs, and
substrate makers. Some players, like Samsung, Intel,
Integrated Thin Film High Density Organic Package
(I-THOP) and Flip Chip - Embedded Interposer
Carrier (FC-EIC).
With-substrate technologies are also used as
alternatives to TSV, for example InFO on substrate,
which is widely used in Apple’s processors. Also,
redistribution layer (RDL) interposer technology is
currently being developed and will hit the market by
2020. Last but not least, Fan Out Chip on Substrate
(FOCoS) was developed and commercialized in 2016,
but seems to be lacking orders.
Hybrid bonding can bridge the two main categories
(with TSV/without TSV). This technology’s
particularity is that it can be simultaneously TSV
challenger and teammate. Since 2016 it has been
commonly used in smartphones’ CIS, and in the near
future it will integrate the high-end market segment
for memory and 2.5D as an interconnection solution.
Overview of the main stacking technologies players
Foundry
OSAT
IDM
Substrate
manufacturer
IP
CoWoS
InFO on substrate
TSV interposer
3D SoC
3D stacked memory
Foveros
EMIB
FOCoS
SWIFT
SLIT
i-THOP
FC-EIC
Hybrid Bonding
2.5D
3D
2.5D
2.5D
3D
TypeType Company** Technology name WithTSV Without
TSV
With
Substrate
Without
Substrate
Embedded in
Substrate
Stacking
technology
RDL interposer
*
*3D SoC will use hybrid bonding TSV may be required **Non-exhaustive list of companies
Alternative technologies
to TSV interposer
EMIB
RDL
interposer SLIT FOCoS
InFO
on substrate
SWIFT Embedded trace
Hybrid
Bonding
i-THOP FC-EIC
This technology is evoked in its details in the CMOS Image Sensors (CIS) section
Silicon bridge
instead of Si
TSV
interposer
RDL
interposer
instead of Si
TSV
interposer
0 m Silicon RDL
deposition and
etching + flip
chip
Embedded metal layers or
embedded Si interposer
2 wafers
bonding with
Cu bumps.
No TSV
needed
Chip first + RDL
deposition +
bumping
Chip last +
RDL
deposition and
etching
Non-exhaustive list of companies

MARKET TECHNOLOGY REPORT
COMPANIES CITED IN THE REPORT (non exhaustive list)
Alchip, Aledia, Alibaba, Amazon, AMD, Amkor, AMS, ANPEC, Apple, ASE, ASUS, Atos, Audi,
Avago, Baidu, Bosch, Bitmain, BitFury, Broadcom, Canaan, Carsem, Cisco, Cray, DARPA, EBANG,
EMmicroelectronic, EPworks, Facebook, Faraday, Fingerprints, Foxconn, Fraunhofer, Fujitsu,
Gigabyte, GlobalFoundries, Google, GUC, HalongMining, HLMC, HP, Huatian, Huawei, Ibiden,
IBM, Icsens, IMEC, Inari Technology, Infineon, Innosilicon, Intel, InvenSense, JCET STATS ChipPAC,
Juniper, Lenovo, Leti, Lfoundry, LGinnotek, mCube, Melexis, Memsic, Mercedes-Benz, Micralyne,
Micron, Microsoft, NEC, Nokia, Nvidia, NXP, Omnivision, ON Semiconductor, OpenSilicon,
Osram, PTI, Samsung, SensL, Shinko, SK Hynix, SMIC, Sony, SPIL, STMicroelectronics, Tencent,
TF, Toshiba, TPK, TSMC, UMC, Unimicron, Xfab, Xilinx, Xintek, XMC, Xperi, YMTC, and more...
Find more
details about
this report here:
RELATED REPORTS
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• Fan-Out Packaging: Technologies and Market
Trends 2019
• Status of Advanced Packaging Industry 2018
• Status of the CMOS Image Sensor Industry 2018
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Mario Ibrahim is
a member of the
Semiconductor
Software division at Yole Développement
(Yole), working as a Technology Market
Analyst for advanced packaging. Mario
develops technology market reports
and produces custom consulting studies.
He is also deeply involved in test activity
business development within the division.
Prior to Yole, Mario specialized in test
activity development for LEDs at Aledia.
He also headed several RD advanced
packaging programs. During his five-year
stay at Aledia, Mario developed strong
technical and managerial expertise in
different semiconductor fields.
Mario holds an Electronics Engineering
degree from Polytech Grenoble (France).
He apprenticed for three years in the
Imaging division of STMicroelectronics
Grenoble, where he contributed to the
testing and benchmarking of automation
advancements within the test validation
team.
AUTHOR

Report scope and objectives 5
Glossary 6
Authors 8
Companies cited in the report 9
Comparison with Yole Développement's 2017
report 10
The three-page report summary 13
3D stacking - packaging market repartition 16
Per segment, per market and per 3D stacking
technology
Executive summary 22
Introduction 57
High-end market segment 74
Trends (artificial intelligence, data center, super
computer, cryptocurrency mining, gaming, AR/
MR/VR)
Forecasts (stacked memory and 2.5D interposer -
wafer, unit production and packaging revenue
and 3D SoC wafer production and packaging
revenue)
Technologies and roadmaps (TSV, 3D stacked
memory, 3D SoC)
Hardware examples, players and supply chain
(hardware for HPC and networking, GPU,
FPGA supply chain and TSV-based product
players)
Conclusions
Mid/low-end market segment 152
CIS: trends, forecast, technologies and
roadmaps, hardware examples, players and
supply chain
MEMS and sensors: trends, forecast, technologies
and roadmaps, hardware examples, players and
supply chain
LED: TSV in LED - wafer and revenue forecasts
Potential future applications for 3D stacking
technologies 216
3D NAND, stacked memory, 3D SoC, and
displays
Appendix 219
Stacking technologies, with and without TSV
About Yole Développement 245
TABLE OF CONTENTS (complete content on i-Micronews.com)
REPORT OBJECTIVES
• Illustrate the impact of the semiconductor market’s mutation on packaging technologies
• Outline three stacking technologies: through silicon via (TSV), 3D system-on-chip, and hybrid
bonding
• Provide an overview of the markets requiring stacking technologies, along with updated market
data and forecasts
• Describe the hardware and key applications that are/will use stacking technologies
• Identify the main players and the supply chain for stacking technologies
• Reference nascent solutions that may challenge some of the existing stacking technologies
• Predict future applications where stacking technologies might be needed
and TSMC, are involved in “with” and “without”
TSV technology development. ASE (an OSAT)
introduced its FOCoS technology to the market
in 2016, while other players like Amkor have
developed their proper technologies but are still
awaiting orders.
Concerning substrate companies like Shinko,
Unimicron, and most recently Fujitsu Interconnect,
they are all still in RD.
Xperi, an IP company, will positively impact the
market because its hybrid bonding technology
is midway between “with” and “without-TSV”
technologies. Xperi’s other advantage is that its
technology is compatible with both high and mid/
low-end segments.
Foundries, IDMs, and IP companies have the
advantage over OSATs in stacking technologies, since
the latter encounter difficulties in obtaining orders.

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MEMS SENSORS
o MARKET ANDTECHNOLOGY REPORT
• Status of the MEMS Industry 2019 - Update
• Status of the Audio Industry 2019 - New
• Uncooled Infrared Imagers and Detectors 2019 – Update
• Consumer Biometrics:Technologies and MarketTrends 2018
• MEMS Pressure Sensor Market and Technologies 2018
• Gas Particle Sensors 2018
o STRUCTURE, PROCESS COST REPORT
• MEMS Sensors Comparison 2019
• MEMS Pressure Sensor Comparison 2018
• Particle Sensors Comparison 2019
• Miniaturized Gas Sensors Comparison 2018
o PATENT REPORT
• MEMS Foundry Business Portfolio 2019 - New
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PHOTONIC AND OPTOELECTRONICS
• Photonic Integrated Circuit 2019 - New
• LiDARs for Automotive and Industrial Applications 2019 - Update
• Silicon Photonics 2018
o PATENT REPORT
• Silicon Photonics for Data Centers: Optical Transceiver 2019 - New
• LiDAR for Automotive 2018
RF DEVICES ANDTECHNOLOGIES
• RF GaN Market:Applications, Players,Technology,
and Substrates 2019 - Update
• 5G’s Impact on RF Front-End Module and Connectivity
for Cell Phones 2019 - Update
• Radar andV2X Market Technology for Automotive 2019 - Update
• Advanced RF Antenna Market Technology 2019 - New
• RF Standards and Technologies for Connected Objects 2018
• RF Front-End Module Comparison 2019 - Update
• Automotive Radar RF Chipset Comparison 2018
o PATENT REPORT
• Antenna for 5GWireless Communications 2019 - New
• RF Front End Modules for Cellphones 2018
• RF Filter for 5G Wireless Communications: Materials and Technologies 2019
• RF GaN : Materials, Devices and Modules 2018
Update : 2018 version still available

IMAGING
• Status of the CIS Industry 2019:Technology
and Foundry Business - Update
• Imaging for Automotive 2019 - Update
• NeuromorphicTechnologies for Sensing 2019 - Update
• Status of the CCM and WLO Industry 2019 - Update
• MachineVision for Industry and Automation 2018
• Sensors for RoboticVehicles 2018
• Compact Camera Modules Comparison 2019
• CMOS Image Sensors Comparison 2019
o PATENT REPORT
• Facial Gesture Recognition Technlogies in Mobile Devices 2019 - New
• Apple iPhone X Proximity Sensor Flood Illuminator 2018
MEDICAL IMAGING AND BIOPHOTONICS
• X-Ray Flat Panel Detectors for Military, Industrial
and Medical Applications 2019 - New
• Microscopy Life Science Cameras: Market and Technology Analysis 2019
• Ultrasound technologies for Medical, Industrial
and Consumer Applications 2018
o PATENT REPORT
• Optical Coherence Tomography Medical Imaging 2018
MICROFLUIDICS
• Status of the Microfluidics Industry 2019 - Update
• Next Generation Sequencing DNA Synthesis - Technology,
Consumables Manufacturing and MarketTrends 2019 - New
• Organ-on-a-Chip Market Technology Landscape 2019 - Update
• Point-of-Need Testing Application of MicrofluidicTechnologies 2018
• Liquid Biopsy: from Isolation to Downstream Applications 2018
• Chinese Microfluidics Industry 2018
o PATENT REPORT
• Microfluidic ManufacturingTechnologies 2019 – New
INKJET AND ACCURATE DISPENSING
• Inkjet Printheads - Dispensing Technologies
Market Landscape 2019 - Update
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for Microsystem Manufacturing 2019 - New
• Piezoelectric Materials from Bulk to Thin Film 2019 - New
• Inkjet Functional and Additive Manufacturing for Electronics 2018
• Piezoelectric Materials from Bulk to Thin Film Comparison 2019

BIOTECHNOLOGIES
• CRISPR-Cas9 Technology: From Lab to Industries 2018
o PATENT REPORT
• Personalized Medicine 2019 – New
BIOMEMS MEDICAL MICROSYSTEMS
• Medical Wearables: Market Technology Analysis 2019 - New
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Healthcare 2018
o PATENT REPORT
• 3D Cell Printing 2019 - New
• CirculatingTumor Cells Isolation 2019 - New
• Nanopore Sequencing 2019 - New
SOFTWARE AND COMPUTING
• Hardware and Software for Artificial Intelligence (AI)
in Automotive Applications 2019 - New
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in Consumer Applications 2019 - Update
• From Image Processing to Deep Learning 2019 - Update
• xPU (Processing Units) for Cryptocurrency, Blockchain, HPC
and Gaming 2019 – New
MEMORY
• Status of the Memory Business 2019 - New
• MRAM Technology and Business 2019 - New
• Emerging NonVolatile Memory 2018
• Memory Comparison 2019
o PATENT REPORT
• Magnetoresistive Random-Access Memory (MRAM) 2019 - New
• 3D Non-Volatile Memory 2018
ADVANCED PACKAGING
• Fan Out PackagingTechnologies and MarketTrends 2019 - Update
• 3D TSV Integration and Monolithic Business Update 2019 - Update
• Advanced RF SiP for Cellphones 2019 - Update
• Status of Advanced Packaging 2019 - Update
• Status of Advanced Substrates 2019 - Update
• Panel Level PackagingTrends 2019 - Update
• RF System-in-Package Materials for 5G 2019 - New
• System in Package (SiP) Technology and Market Trends 2019 - New
• Trends in Automotive Packaging 2018
• Thin-Film Integrated Passive Devices 2018
• Advanced RF SiP for Cellphones Comparison 2019

SEMICONDUCTOR MANUFACTURING
• Nano Imprint Lithography 2019 - New
• Equipment and Materials for Fan Out Packaging 2019 - Update
• Equipment for More than Moore:Thin Film Deposition
Etching 2019 - New
• Wafer Starts for More Than Moore Applications 2018
• Polymeric Materials atWafer-Level
for Advanced Packaging 2018
• Bonding and Lithography Equipment Market
for More than Moore Devices 2018
• Wafer Bonding Comparison 2018
o PATENT REPORT
• Hybrid Bonding for 3D Stack 2019 – New
SOLID STATE LIGHTING
• Status of the Solid State Light Source Industry 2019 - New
• Edge Emitting Lasers (EELS) 2019 - New
• Light Shaping Technologies 2019 - New
• Automotive Advanced Front Lighting Systems 2019 - New
• VCSELs - Technology, Industry and MarketTrends 2019 - Update
• IR LEDs and Laser Diodes – Technology,Applications,
and Industry Trends 2018
• Automotive Lighting 2018:Technology, Industry and MarketTrends
• UV LEDs - Technology, Manufacturing and ApplicationTrends 2018
• LiFi:Technology, Industry and MarketTrends 2018
• VCSEL Comparison 2019
o PATENT REPORT
• VCSELs 2018
DISPLAY
• Next Generation 3D Display 2019 - New
• Next Generation Human Machine Interaction (HMI)in Displays 2019 - New
• Micro-and Mini-LED Displays 2019 - Update
• QD and Wide Color gamut (WCG)
Display Technologies 2019 - Update
• Displays OpticalVision Systems forVR,AR MR 2018
o PATENT REPORT
• MicroLED Displays : Intellectual Property Landscape 2018

POWER ELECTRONICS
• Power SiC: Materials, Devices and Applications 2019 - Update
• Power Electronics for EV/HEV and e-mobility:
Market, Innovations and Trends 2019 - Update
• Status of the Power Electronics Industry 2019 - Update
• Discrete Power Packaging : Material Market
and Technology Trends 2019 - New
• Status of the Power ICs Industry 2019 - Update
• Status of the Passive Components for the Power Electronics
Industry 2019 - Update
• Status of the Inverter Industry 2019 - Update
• Status of the Power Module Packaging Industry 2019 - Update
• Wireless Charging Market Expectations
and Technology Trends 2018
• Power GaN 2018: Epitaxy, Devices,Applications
and Technology Trends
• Automotive Power Module Packaging Comparison 2018
• GaN-on-Silicon Transistor Comparison 2019
• SiC Transistor Comparison 2019
o PATENT REPORT
• Power SiC : Materials, Devices and Modules 2019 - New
• Power GaN : Materials, Devices and Modules 2019 – Update
BATTERY ENERGY MANAGEMENT
• Status of the Rechargeable Li-ion Battery Industry 2019 - New
• Li-ion Battery Packs for Automotive and Stationary Storage
Applications 2019 - Update
o PATENT REPORT
• Battery Energy Density Increase: Materials
and EmergingTechnologies 2019 - New
• Solid-State Batteries 2019 - New
• Status of the Battery Patents 2018
COMPOUND SEMI.
• Emerging Compound Semiconductor
Market Technology Trends 2019 - New
• Status of the Compound Semiconductor Industry 2019 - New
• InP Materials, Devices and Applications 2019 - New
• GaAsWafer and Epiwafer Market: RF, Photonics,
LED and PV Applications 2018
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• GaN-on-Silicon Substrate: Materials, Devices
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The following deliverables will be included in the monitors:
• An Excel database with all historical and forecast data
• A PDF slide deck with graphs and comments/analyses covering the expected
evolutions
o ADVANCED PACKAGING – NEW
This monitor will provide the evolution of the advanced packaging platforms. It will
cover Fan-Out Wafer Level Packaging (WLP), Fan-Out Panel Level Packaging (PLP),
Wafer-Level Chip Scale Packaging (WLCSP), Flip Chip packaging platforms, and 2.5D
and 3D Through Silicon Via (TSV) integration. Frequency: Quarterly, starting from Q3
2019
o COMPOUND SEMI. – NEW
This monitor will describe how the compound semiconductor industry is evolving. It
will offer a close look at GaAs, InP, SiC, GaN and other compounds of interest
providing wafer volumes, revenues, application breakdowns and momentum.
Frequency: Quarterly, starting from Q3 2019
o CAMERA MODULE – NEW
This monitor will provide the evolution of the imaging industry, with a close look at
image sensor, camera module, lens and VCM. Volumes, revenues and momentum of
companies like Sony, Samsung, Omnivision and OnSemi will thus be analysed.
Frequency: Quarterly, starting from Q3 2019
o MEMORY – UPDATE
For the memory industry you can have access to a quaterly monitor, as well as an
additional service, a monthly pricing. Both services can be bought seprately:
• DRAM Service: Including a quarterly monitor and monthly pricing.
• NAND Service: Including a quarterly monitor and monthly pricing.
REVERSETECHNOLOGY MONITOR by System Plus Consulting
o SMARTPHONES – NEW
To stay updated on the latest components, packaging and silicon chip choices of the smartphone makers, System Plus Consulting has created its first Smartphone Reverse
Technology monitor. This year, get access to the packaging and silicon content database of at least 20 different flagship smartphones – more than five per quarter. Starting at the
beginning of 2019, the monitor will include an Excel database report for each phone and a quarterly comparison.

OUR 2019 MONITORS COLLECTION (2/2)
Get the most updated overview of your market to monitor your strategy
PATENT MONITOR by KnowMade
A FULL PACKAGE:
Starting at the beginning of the year, the KnowMade monitors include the following
deliverables:
• An Excel file including the monthly IP database of:
• New patent applications
• Newly granted patents
• Expired or abandoned patents
• Transfer of IP rights through re-assignment and licensing
• Patent litigation and opposition
• Quarterly report including a PDF slide deck with the key facts figures of the
quarter: IP trends over the three last months, with a close look to key IP players and
key patented technologies.
o GaN for Power RF Electronics
Wafers and epiwafers, GaN-on-SiC, silicon, sapphire or diamond, semiconductor
devices such as transistors, and diodes, devices and applications including converters,
rectifiers, switches, amplifiers, filters, and Monolothic Microwave Integrated Circuits
(MMICs), packaging, modules and systems.
o GaN for Optoelectronics Photonics
Wafers and epiwafers, GaN-on-sapphire, SiC or silicon; semiconductor devices such
as LEDs and lasers; and applications including lighting, display, visible communication,
photonics, packaging, modules and systems.
o Li-ion Batteries
Anodes made of lithium metal, silicon, and lithium titanate (LTO); cathodes made of
Lithium Iron Phosphate (LFP), Nickel-Manganese-Cobalt (NMC), Lithium Nickel
Cobalt Aluminium Oxide (NCA), Lithium Nickel Metal Dioxide (LiNiMO2), Lithium
Metal Phosphate (LiMPO4), and Lithium Metal Tetroxide (LiMO4); electrolytes
including liquid, polymer/gel, and solid inorganics; ceramic and other separators;
battery cells including thin film/microbattery, flexible, cylindrical and prismatic; and
battery packs and systems.
o Post Li-ion Batteries
Battery technologies including redox-flow batteries, sodium-ion, lithiumsulfur, lithium-
air, and magnesium-ion, and their supply chains, including electrodes, electrolytes,
battery cells and battery packs/systems.
o Solid-State Batteries
Supply chain including electrodes, battery cells, battery packs/systems and
electrolytes, including polymer, inorganic and inorganic/polymer, inorganic materials,
including argyrodites, LIthium Super Ionic CONductor, (LISICONs), Thio-LISICONs,
sulfide glasses, oxide glasses, perovskites, anti-perovskites and garnets.
o RF Acoustic Wave Filters
Including Surface Acoustic Wave (SAW), Temperature Compensated (TC)- SAW, Bulk
Acoustic Wave- Free-standing Bulk Acoustic Resonator (BAWFBAR), BAW-Solidly-
Mounted Resonator (BAW-SMR), and Packaging.
o RF Power Amplifiers
Including Low Noise Amplifiers, Doherty Amplifiers, Packaging, and Millimeter-Wave
technology.
o RF Front-End Modules
o Microfluidics
From components to chips and systems, including all applications.

MICRONEWS MEDIA
o About Micronews Media
To meet the growing demand for market,
technological and business information,
Micronews Media integrates several tools able
to reach each individual contact within its
network.We will ensure you benefit from this.
ONLINE ONSITE INPERSON
@Micronews e-newsletter
i-Micronews.com
i-Micronewsjp.com
FreeFullPDF.com
Events Webcasts
Unique, cost-effective ways
to reach global audiences.
Online display advertising
campaigns are great strategies
for improving your
product/brand visibility.They
are also an efficient way to
adapt with the demands of the
times and to evolve an effective
marketing plan and strategy.
Brand visibility, networking
opportunities
Today's technology makes it
easy for us to communicate
regularly, quickly, and
inexpensively – but when
understanding each other is
critical, there is no substitute
for meeting in-person. Events
are the best way to exchange
ideas with your customers,
partners, prospects while
increasing your brand/product
visibility.
Targeted audience
involvement equals clear,
concise perception of your
company’s message.
Webcasts are a smart,
innovative way of
communicating to a wider
targeted audience.Webcasts
create very useful, dynamic
reference material for
attendees and also for
absentees, thanks to the
recording technology.
Benefit from the i-Micronews.com
traffic generated by the 11,200+
monthly unique visitors, the
10,500+ weekly readers of
@Micronews e-newsletter
Several key events planned for
2018 on different topics to
attract 120 attendees on average
Gain new leads for your business
from an average of 340
registrants per webcast
Contact: CamilleVeyrier (veyrier@yole.fr), Marketing Communication Director

CONTACT INFORMATION
o CONSULTING AND SPECIFICANALYSIS, REPORT
BUSINESS
• North America:
• Steve LaFerriere, Senior Sales Director forWestern US
Canada
Email: laferriere@yole.fr – + 1 310 600-8267
• Troy Blanchette, Senior Sales Director for Eastern US
Canada
Email: troy.blanchette@yole.fr – +1 704 859-0453
• Japan Rest of Asia:
• Takashi Onozawa, General Manager,Asia Business
Development (India ROA)
Email: onozawa@yole.fr - +81 34405-9204
• Miho Othake, Account Manager (Japan)
Email: ohtake@yole.fr - +81 3 4405 9204
• Itsuyo Oshiba, Account Manager (Korea Singapore)
Email: oshiba@yole.fr - +81-80-3577-3042
• Greater China: Mavis Wang, Director of Greater China Business
Development
Email: wang@yole.fr - +886 979 336 809
• Europe: Lizzie Levenez, EMEA Business Development Manager
Email: levenez@yole.fr - +49 15 123 544 182
• RoW: Jean-Christophe Eloy, CEO President,Yole Développement
Email eloy@yole.fr - +33 4 72 83 01 80
o FINANCIAL SERVICES (in partnership withWoodside
Capital Partners)
• Jean-Christophe Eloy, CEO President
Email: eloy@yole.fr - +33 4 72 83 01 80
• Ivan Donaldson,VP of Financial Market Development
Email: ivan.donaldson@yole.fr - +1 208 850 3914
o CUSTOM PROJECT SERVICES
• Jérome Azémar,Technical Project Development Director
Email: azemar@yole.fr - +33 6 27 68 69 33
o GENERAL
• CamilleVeyrier, Director, Marketing Communication
Email: veyrier@yole.fr - +33 472 83 01 01
• Sandrine Leroy, Director, Public Relations
Email: leroy@yole.fr - +33 4 72 83 01 89 / +33 6 33 11 61 55
• Email: info@yole.fr - +33 4 72 83 01 80
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2.5D / 3D TSV & Wafer-Level Stacking: Technology & Market Updates 2019 Report by Yole Developpement