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Conference on Design and Architectures for Signal and Image Processing -2010
October 26th-28th, 2010,
Edinburgh, Scotland
Electronic Chips & Systems design Initiative
RVC: A MULTI-DECODER CAL
COMPOSER TOOL
M. Mattavelli and G. Roquier
EPFL, Lausanne
SWITZERLAND
F. Palumbo, D. Pani, E. Manca
and L. Raffo
EOLAB - Microelectronics Lab
DIEE , Cagliari – ITALY
DASIP2010–October26th-28th,Edinburgh,Scotland
Outline
• Problem statement
• The Multi-Decoder CAL Composer tool
– The CAL2GRAPH algorithm
– The MERGER algorithm
• Use-Case: the parallel and the serial MPEG-4 SP
• Final remarks and exploitation
DASIP2010–October26th-28th,Edinburgh,Scotland
Problem Statement
• The problem of defining an efficient formalism for
codecs specification has been recently addressed by
the MPEG group through the development of the
Reconfigurable Video Coding (RVC) framework.
• In this work we have moved one step further,
conceiving the Multi-Decoder CAL Composer (MDCC)
tool, based on the MPEG RVC formalism, able to
characterize multi-decoder platforms.
• The MDCC is based on a platform template able to
allow fast switching among codecs configurations
without the need of any complete context switch.
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Basis
Decoder Composition
Mechanism VTL
(RVC-CAL FUs)
Selection of FUs
and Parameter Assignment
Abstract Decoder Model
(FNL+RVC-CAL)
Decoder Description
(FNL+BSDL)
• Specification: dataflow programs composed by a
network of Functional Units (FUs) belonging to a
standard Video Tool Library (VTL).
• The modularity property allows to conceive
implementation procedures based on static or
dynamic reconfigurations.
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Definition
• Looking at the similarities between the decoding
algorithms to be integrated in a single description,
the MDCC automatically composes a single
configurable multi-decoder which is formed by:
– All the required modules necessary to accomplish the
video processing task;
– Some routing modules (Sbox) responsible of defining the
correct path of the data and of guaranteeing the
functionalities of each single integrated decoders;
– A central controller, which is able to reconfigure the
platform at runtime according to the information in the
incoming stream.
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Working Principle (1)
DEC. 1 DEC. 2
MDCC tool
MDCC merges DEC.1 and
DEC.2 creating a single
multi-standard DEC, that
can be easily converted
into a proprietary hw/sw
implementation.
Decoder Composition
Mechanism VTL
(RVC-CAL FUs)
Selection of FUs
and Parameter Assignment
Abstract Decoder Model
(FNL+RVC-CAL)
Decoder Description
(FNL+BSDL)
B F
D
G
C
Sbox E
A
Sbox
A
B
C
D
E
A
B
F
G
E
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Working Principle (2)
DEC. 1 DEC. 2
MDCC tool
Decoder Composition
Mechanism VTL
(RVC-CAL FUs)
Selection of FUs
and Parameter Assignment
Abstract Decoder Model
(FNL+RVC-CAL)
Decoder Description
(FNL+BSDL)
MDCC analyzes the RVC
“abstract specifications”
of DEC.1 and DEC.2 and
inserts the Sboxes to
enable the non-shared
items just when needed.
B F
D
G
C
Sbox E
A
Sbox
A
B
C
D
E
A
B
F
G
E
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Working Principle (3)
A
B
C
D
E
A
B
F
G
E
Decoder Composition
Mechanism VTL
(RVC-CAL FUs)
Selection of FUs
and Parameter Assignment
Abstract Decoder Model
(FNL+RVC-CAL)
Decoder Description
(FNL+BSDL)
DEC. 1 DEC. 2
MDCC tool
Sbox units allow to
change, at runtime, the
topology in order to
define which DEC is in
use.
B F
D
G
C
Sbox E
A
Sbox
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Working Principle (4)
Decoder Composition
Mechanism VTL
(RVC-CAL FUs)
Selection of FUs
and Parameter Assignment
Abstract Decoder Model
(FNL+RVC-CAL)
Decoder Description
(FNL+BSDL)
B F
D
G
C
Sbox E
A
Sbox
DEC. 1 DEC. 2
MDCC tool
MDCC allows to switch
from DEC.1 to DEC.2
according to the incoming
bitstream, without any
complete context switch.
A
B
C
D
E
A
B
F
G
E
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool: Input and Output
• The MDCC tool:
― as inputs receives the RVC-CAL abstract DECs model
― as outputs creates the C++ directed graph (DG) of the
multi-decoder environment
DASIP2010–October26th-28th,Edinburgh,Scotland
• The MDCC tool is composed of:
― the CAL2GRAPH interpreter, which creates the C++ DG of
a single DEC
― the MERGER, which creates the multi-decoder C++ DG
starting from two DGs.
The MDCC tool: Building Blocks
DASIP2010–October26th-28th,Edinburgh,Scotland
The CAL2GRAPH: Basis
• It operates on the single DEC basis
• It generates a flattened C++ DG, composed of atomic
actors only
– Nodes : atomic actors
– Arcs: connection among actors
• It works in three steps:
– FNL analysis, using a FLEX lexical analyzer, to determine the
Lexical Tokens (LTs)
– LTs processing, using a Bison grammar interpreter, to create the
DG
– Recursive iteration until the DG is not completely atomic.
Abstract Decoder Model
(FNL+RVC-CAL)
CAL2GRAPH C++ Decoder graph
DASIP2010–October26th-28th,Edinburgh,Scotland
The CAL2GRAPH: Building Blocks
• Actor Interface Section -> nodes management
• Link Section -> connection management
• Final Section -> recursion management
DASIP2010–October26th-28th,Edinburgh,Scotland
The CAL2GRAPH: Actor Interface Section
• Actor Interface Section -> nodes management through the
FNL parsing:
― as soon as an actor is found a node is instantiated in the DG
― if the instantiated node is not atomic a reference is pushed in
the recursion queue
DASIP2010–October26th-28th,Edinburgh,Scotland
The CAL2GRAPH: Link Section
• Link Section -> connection management through the FNL
parsing:
― global input to network port or sub-network input port with network output
port
― network port to global output or sub-network output port with network
input port
― Generic intermediate nodes connection
DASIP2010–October26th-28th,Edinburgh,Scotland
The CAL2GRAPH: Final Section
• Final Section -> recursion management through the recursion
queue analysis:
― If it is empty the DG is complete
― If it is not empty the DG graph is still not completely atomic and recursion
can take place, by popping a reference from the recursion queue and
executing the CAL2GRAPH again
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Basis
• It operates on a couple of C++ DGs
• It generates the global multi-decoder C++ DG of the
entire multi-standard system
– Integrating the whole set of actors of the original DGs.
– Preserving the connections among nodes.
– Placing the Sbox units are at the crossroads between different
paths, to allow more than one DG to share a common dataflow
where some actors are in common and some others are not.
MERGER
C++ Decoder graph 1
C++ Decoder graph 2
C++ Decoder graph 3
Global multi-decoder
C++graph
multi-decoder
C++graph
MERGER
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (1)
• The MERGER starts from the root of the two dataflows
• Three iterations on I:
– I to A, I to B -> the same on both reported as they are
– I to C/D -> Sbox to be inserted
• Children Set: [A,B,C,D]
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[I,J]
Children Nodes
[A,B,C,D]
Father Nodes
[I,J]
DEC. 1 DEC. 2
B
A
I
C
D
Sbox
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (2)
• One iteration on J:
– J to E -> the same on both reported as it is
• Iteration on Father Nodes is complete
• Children Set: [A,B,C,D,E]. Father Nodes = Children Nodes
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[I,J]
Children Nodes
[A,B,C,D,E]
DEC. 1 DEC. 2
B
A
I
C
EJ
D
Sbox
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (3)
• One iteration on A:
– A to F/H -> Sbox to be inserted
• Children Set: [F,H]
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[A,B,C,D,E]
Children Nodes
[F,H]
DEC. 1 DEC. 2H
B
A
I
C
EJ
D
Sbox
Sbox
F
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (4-5)
• Iteration on B and C:
– Nothing has to be done
• Children Set: [F,H]
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[A,B,C,D,E]
Children Nodes
[F,H]
DEC. 1 DEC. 2H
B
A
I
C
EJ
D
Sbox
Sbox
F
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (6)
• One iteration on D:
– D to F -> F is already in the global DG -> Sbox to be inserted
• Children Set: [F,H]
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[A,B,C,D,E]
Children Nodes
[F,H]
DEC. 1 DEC. 2H
B
A
I
C
EJ
D
Sbox
Sbox
Sbox F
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (7)
• One iteration on E:
– E to G -> the same on both reported as it is
• Children Set: [F,H,G]. Iteration on Father Nodes is complete
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[A,B,C,D,E]
Children Nodes
[F,H,G]
DEC. 1 DEC. 2H
B
A
I
C
EJ G
D
Sbox
Sbox
Sbox F
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (8)
• One iteration on F:
– F to O -> the same on both reported as it is
• Children Set: [O]
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[F,H,G]
Children Nodes
[O]
DEC. 1 DEC. 2H
B
A
I
C
EJ G
D
Sbox
Sbox
Sbox OF
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (9-10)
• Iteration on H and G:
– Nothing has to be done
• Children Set: [O]
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[F,H,G]
Children Nodes
[O]
DEC. 1 DEC. 2H
B
A
I
C
EJ G
D
Sbox
Sbox
Sbox OF
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example (11)
• One iteration on 0:
– O is a global output, nothing has to be done
• Children Set: []. The MERGER terminates.
B
C
A F
E G
B
A H
E G
FDI
J J
I
O
O
Father Nodes
[O]
Children Nodes
[]
DEC. 1 DEC. 2H
B
A
I
C
EJ G
D
Sbox
Sbox
Sbox OF
DASIP2010–October26th-28th,Edinburgh,Scotland
The MERGER: Application Example
H
B
A
I
C
EJ
G
D
Sbox
Sbox
Sbox OF
DASIP2010–October26th-28th,Edinburgh,Scotland
Use Case: Parallel and Serial MPEG-4 SP(1)
PARALLEL MPEG4-SP
SERIAL MPEG4-SP
DASIP2010–October26th-28th,Edinburgh,Scotland
Use Case: Parallel and Serial MPEG-4 SP(2)
• Multi-decoder units:
46 instead of 59.
• Multi-decoder units +
Sbox:
64 instead of 59.
• It is less costly to
integrate Sbox units
than more complex ones
(e.g. DCT and FFT).
• The more the integrated
dataflows the more will
be the instantiated Sbox
units.
DASIP2010–October26th-28th,Edinburgh,Scotland
Use Case: Parallel and Serial MPEG-4 SP(3)
DASIP2010–October26th-28th,Edinburgh,Scotland
Final Remarks
• Exploiting the modularity property of the RVC
formalism it is possible to implement an automatic
method for video codecs formal definition.
• The proposed Multi-Decoder CAL Composer tool has
been already successfully tested on factitious
dataflows and also on a MPEG-4 SP use case,
merging its serial and parallel descriptions.
• This tool is fully compatible with other RVC-CAL state
of the art tools: all the outputs are provided along
with the FNL descriptions.
DASIP2010–October26th-28th,Edinburgh,Scotland
The MDCC tool Possible Exploitations
• From the hardware viewpoint:
– Completing the MDCC with a tool called graph2HW in order
to accomplish the automatic creation of the HDL
description of the overall multi-decoder platform.
• From the software viewpoint:
– Completing the MDCC with a high level profiler tool in order
to allow to bridge the gap between hardware physical
implementation and software development. This tool will
operate at the direct graph level combining lower level
back-annotated information with higher level functional
information.
DASIP2010–October26th-28th,Edinburgh,Scotland
Acknowledgements
The research leading to these results has received funding from:
the European Community's Seventh
Framework Programme (FP7/2007-
2013) under grant agreement no.
248424, MADNESS Project
the Region of Sardinia, Young
Researchers Grant, PO Sardegna FSE
2007-2013, L.R.7/2007 “Promotion of
the scientific research and
technological innovation in Sardinia”
under grant agreement CRP-18324
RPCT Project
Conference on Design and Architectures for Signal and Image Processing -2010
October 26th-28th, 2010,
Edinburgh, Scotland
Electronic Chips & Systems design Initiative
RVC: A MULTI-DECODER CAL
COMPOSER TOOL
Francesca Palumbo, Ph.D.
francesca.palumbo@diee.unica.it
EOLAB - Microelectronics Lab
Dept. of Electrical and Electronics Eng.
University of Cagliari (ITALY)
Read full paper
• IEEE Xplore Digital Library
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=570
6258&tag=1
• RPCT Project Website:
http://sites.unica.it/rpct/references/
• @INPROCEEDINGS{Palumbo_DASIP2010,
author={F. Palumbo and D. Pani and E. Manca and L. Raffo
and M. Mattavelli and G. Roquier},
booktitle={Design and Architectures for Signal and Image
Processing (DASIP), 2010 Conference on},
title={RVC: A multi-decoder CAL Composer tool},
year={2010},
pages={144-151},
month={Oct},}
Reference: BibTex

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RVC: A Multi-Decoder CAL Composer Tool

  • 1. Conference on Design and Architectures for Signal and Image Processing -2010 October 26th-28th, 2010, Edinburgh, Scotland Electronic Chips & Systems design Initiative RVC: A MULTI-DECODER CAL COMPOSER TOOL M. Mattavelli and G. Roquier EPFL, Lausanne SWITZERLAND F. Palumbo, D. Pani, E. Manca and L. Raffo EOLAB - Microelectronics Lab DIEE , Cagliari – ITALY
  • 2. DASIP2010–October26th-28th,Edinburgh,Scotland Outline • Problem statement • The Multi-Decoder CAL Composer tool – The CAL2GRAPH algorithm – The MERGER algorithm • Use-Case: the parallel and the serial MPEG-4 SP • Final remarks and exploitation
  • 3. DASIP2010–October26th-28th,Edinburgh,Scotland Problem Statement • The problem of defining an efficient formalism for codecs specification has been recently addressed by the MPEG group through the development of the Reconfigurable Video Coding (RVC) framework. • In this work we have moved one step further, conceiving the Multi-Decoder CAL Composer (MDCC) tool, based on the MPEG RVC formalism, able to characterize multi-decoder platforms. • The MDCC is based on a platform template able to allow fast switching among codecs configurations without the need of any complete context switch.
  • 4. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Basis Decoder Composition Mechanism VTL (RVC-CAL FUs) Selection of FUs and Parameter Assignment Abstract Decoder Model (FNL+RVC-CAL) Decoder Description (FNL+BSDL) • Specification: dataflow programs composed by a network of Functional Units (FUs) belonging to a standard Video Tool Library (VTL). • The modularity property allows to conceive implementation procedures based on static or dynamic reconfigurations.
  • 5. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Definition • Looking at the similarities between the decoding algorithms to be integrated in a single description, the MDCC automatically composes a single configurable multi-decoder which is formed by: – All the required modules necessary to accomplish the video processing task; – Some routing modules (Sbox) responsible of defining the correct path of the data and of guaranteeing the functionalities of each single integrated decoders; – A central controller, which is able to reconfigure the platform at runtime according to the information in the incoming stream.
  • 6. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Working Principle (1) DEC. 1 DEC. 2 MDCC tool MDCC merges DEC.1 and DEC.2 creating a single multi-standard DEC, that can be easily converted into a proprietary hw/sw implementation. Decoder Composition Mechanism VTL (RVC-CAL FUs) Selection of FUs and Parameter Assignment Abstract Decoder Model (FNL+RVC-CAL) Decoder Description (FNL+BSDL) B F D G C Sbox E A Sbox A B C D E A B F G E
  • 7. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Working Principle (2) DEC. 1 DEC. 2 MDCC tool Decoder Composition Mechanism VTL (RVC-CAL FUs) Selection of FUs and Parameter Assignment Abstract Decoder Model (FNL+RVC-CAL) Decoder Description (FNL+BSDL) MDCC analyzes the RVC “abstract specifications” of DEC.1 and DEC.2 and inserts the Sboxes to enable the non-shared items just when needed. B F D G C Sbox E A Sbox A B C D E A B F G E
  • 8. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Working Principle (3) A B C D E A B F G E Decoder Composition Mechanism VTL (RVC-CAL FUs) Selection of FUs and Parameter Assignment Abstract Decoder Model (FNL+RVC-CAL) Decoder Description (FNL+BSDL) DEC. 1 DEC. 2 MDCC tool Sbox units allow to change, at runtime, the topology in order to define which DEC is in use. B F D G C Sbox E A Sbox
  • 9. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Working Principle (4) Decoder Composition Mechanism VTL (RVC-CAL FUs) Selection of FUs and Parameter Assignment Abstract Decoder Model (FNL+RVC-CAL) Decoder Description (FNL+BSDL) B F D G C Sbox E A Sbox DEC. 1 DEC. 2 MDCC tool MDCC allows to switch from DEC.1 to DEC.2 according to the incoming bitstream, without any complete context switch. A B C D E A B F G E
  • 10. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool: Input and Output • The MDCC tool: ― as inputs receives the RVC-CAL abstract DECs model ― as outputs creates the C++ directed graph (DG) of the multi-decoder environment
  • 11. DASIP2010–October26th-28th,Edinburgh,Scotland • The MDCC tool is composed of: ― the CAL2GRAPH interpreter, which creates the C++ DG of a single DEC ― the MERGER, which creates the multi-decoder C++ DG starting from two DGs. The MDCC tool: Building Blocks
  • 12. DASIP2010–October26th-28th,Edinburgh,Scotland The CAL2GRAPH: Basis • It operates on the single DEC basis • It generates a flattened C++ DG, composed of atomic actors only – Nodes : atomic actors – Arcs: connection among actors • It works in three steps: – FNL analysis, using a FLEX lexical analyzer, to determine the Lexical Tokens (LTs) – LTs processing, using a Bison grammar interpreter, to create the DG – Recursive iteration until the DG is not completely atomic. Abstract Decoder Model (FNL+RVC-CAL) CAL2GRAPH C++ Decoder graph
  • 13. DASIP2010–October26th-28th,Edinburgh,Scotland The CAL2GRAPH: Building Blocks • Actor Interface Section -> nodes management • Link Section -> connection management • Final Section -> recursion management
  • 14. DASIP2010–October26th-28th,Edinburgh,Scotland The CAL2GRAPH: Actor Interface Section • Actor Interface Section -> nodes management through the FNL parsing: ― as soon as an actor is found a node is instantiated in the DG ― if the instantiated node is not atomic a reference is pushed in the recursion queue
  • 15. DASIP2010–October26th-28th,Edinburgh,Scotland The CAL2GRAPH: Link Section • Link Section -> connection management through the FNL parsing: ― global input to network port or sub-network input port with network output port ― network port to global output or sub-network output port with network input port ― Generic intermediate nodes connection
  • 16. DASIP2010–October26th-28th,Edinburgh,Scotland The CAL2GRAPH: Final Section • Final Section -> recursion management through the recursion queue analysis: ― If it is empty the DG is complete ― If it is not empty the DG graph is still not completely atomic and recursion can take place, by popping a reference from the recursion queue and executing the CAL2GRAPH again
  • 17. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Basis • It operates on a couple of C++ DGs • It generates the global multi-decoder C++ DG of the entire multi-standard system – Integrating the whole set of actors of the original DGs. – Preserving the connections among nodes. – Placing the Sbox units are at the crossroads between different paths, to allow more than one DG to share a common dataflow where some actors are in common and some others are not. MERGER C++ Decoder graph 1 C++ Decoder graph 2 C++ Decoder graph 3 Global multi-decoder C++graph multi-decoder C++graph MERGER
  • 18. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (1) • The MERGER starts from the root of the two dataflows • Three iterations on I: – I to A, I to B -> the same on both reported as they are – I to C/D -> Sbox to be inserted • Children Set: [A,B,C,D] B C A F E G B A H E G FDI J J I O O Father Nodes [I,J] Children Nodes [A,B,C,D] Father Nodes [I,J] DEC. 1 DEC. 2 B A I C D Sbox
  • 19. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (2) • One iteration on J: – J to E -> the same on both reported as it is • Iteration on Father Nodes is complete • Children Set: [A,B,C,D,E]. Father Nodes = Children Nodes B C A F E G B A H E G FDI J J I O O Father Nodes [I,J] Children Nodes [A,B,C,D,E] DEC. 1 DEC. 2 B A I C EJ D Sbox
  • 20. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (3) • One iteration on A: – A to F/H -> Sbox to be inserted • Children Set: [F,H] B C A F E G B A H E G FDI J J I O O Father Nodes [A,B,C,D,E] Children Nodes [F,H] DEC. 1 DEC. 2H B A I C EJ D Sbox Sbox F
  • 21. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (4-5) • Iteration on B and C: – Nothing has to be done • Children Set: [F,H] B C A F E G B A H E G FDI J J I O O Father Nodes [A,B,C,D,E] Children Nodes [F,H] DEC. 1 DEC. 2H B A I C EJ D Sbox Sbox F
  • 22. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (6) • One iteration on D: – D to F -> F is already in the global DG -> Sbox to be inserted • Children Set: [F,H] B C A F E G B A H E G FDI J J I O O Father Nodes [A,B,C,D,E] Children Nodes [F,H] DEC. 1 DEC. 2H B A I C EJ D Sbox Sbox Sbox F
  • 23. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (7) • One iteration on E: – E to G -> the same on both reported as it is • Children Set: [F,H,G]. Iteration on Father Nodes is complete B C A F E G B A H E G FDI J J I O O Father Nodes [A,B,C,D,E] Children Nodes [F,H,G] DEC. 1 DEC. 2H B A I C EJ G D Sbox Sbox Sbox F
  • 24. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (8) • One iteration on F: – F to O -> the same on both reported as it is • Children Set: [O] B C A F E G B A H E G FDI J J I O O Father Nodes [F,H,G] Children Nodes [O] DEC. 1 DEC. 2H B A I C EJ G D Sbox Sbox Sbox OF
  • 25. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (9-10) • Iteration on H and G: – Nothing has to be done • Children Set: [O] B C A F E G B A H E G FDI J J I O O Father Nodes [F,H,G] Children Nodes [O] DEC. 1 DEC. 2H B A I C EJ G D Sbox Sbox Sbox OF
  • 26. DASIP2010–October26th-28th,Edinburgh,Scotland The MERGER: Application Example (11) • One iteration on 0: – O is a global output, nothing has to be done • Children Set: []. The MERGER terminates. B C A F E G B A H E G FDI J J I O O Father Nodes [O] Children Nodes [] DEC. 1 DEC. 2H B A I C EJ G D Sbox Sbox Sbox OF
  • 28. DASIP2010–October26th-28th,Edinburgh,Scotland Use Case: Parallel and Serial MPEG-4 SP(1) PARALLEL MPEG4-SP SERIAL MPEG4-SP
  • 29. DASIP2010–October26th-28th,Edinburgh,Scotland Use Case: Parallel and Serial MPEG-4 SP(2) • Multi-decoder units: 46 instead of 59. • Multi-decoder units + Sbox: 64 instead of 59. • It is less costly to integrate Sbox units than more complex ones (e.g. DCT and FFT). • The more the integrated dataflows the more will be the instantiated Sbox units.
  • 31. DASIP2010–October26th-28th,Edinburgh,Scotland Final Remarks • Exploiting the modularity property of the RVC formalism it is possible to implement an automatic method for video codecs formal definition. • The proposed Multi-Decoder CAL Composer tool has been already successfully tested on factitious dataflows and also on a MPEG-4 SP use case, merging its serial and parallel descriptions. • This tool is fully compatible with other RVC-CAL state of the art tools: all the outputs are provided along with the FNL descriptions.
  • 32. DASIP2010–October26th-28th,Edinburgh,Scotland The MDCC tool Possible Exploitations • From the hardware viewpoint: – Completing the MDCC with a tool called graph2HW in order to accomplish the automatic creation of the HDL description of the overall multi-decoder platform. • From the software viewpoint: – Completing the MDCC with a high level profiler tool in order to allow to bridge the gap between hardware physical implementation and software development. This tool will operate at the direct graph level combining lower level back-annotated information with higher level functional information.
  • 33. DASIP2010–October26th-28th,Edinburgh,Scotland Acknowledgements The research leading to these results has received funding from: the European Community's Seventh Framework Programme (FP7/2007- 2013) under grant agreement no. 248424, MADNESS Project the Region of Sardinia, Young Researchers Grant, PO Sardegna FSE 2007-2013, L.R.7/2007 “Promotion of the scientific research and technological innovation in Sardinia” under grant agreement CRP-18324 RPCT Project
  • 34. Conference on Design and Architectures for Signal and Image Processing -2010 October 26th-28th, 2010, Edinburgh, Scotland Electronic Chips & Systems design Initiative RVC: A MULTI-DECODER CAL COMPOSER TOOL Francesca Palumbo, Ph.D. francesca.palumbo@diee.unica.it EOLAB - Microelectronics Lab Dept. of Electrical and Electronics Eng. University of Cagliari (ITALY)
  • 35. Read full paper • IEEE Xplore Digital Library http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=570 6258&tag=1 • RPCT Project Website: http://sites.unica.it/rpct/references/
  • 36. • @INPROCEEDINGS{Palumbo_DASIP2010, author={F. Palumbo and D. Pani and E. Manca and L. Raffo and M. Mattavelli and G. Roquier}, booktitle={Design and Architectures for Signal and Image Processing (DASIP), 2010 Conference on}, title={RVC: A multi-decoder CAL Composer tool}, year={2010}, pages={144-151}, month={Oct},} Reference: BibTex