This document analyzes a binary DC source reduced switch 7-level inverter using unipolar PWM control strategies. It proposes a 7-level inverter topology with two DC sources and reduced switching devices. The inverter is simulated in MATLAB/Simulink using three unipolar PWM strategies - phase disposition, alternate phase opposition disposition, and carrier overlapping with sinusoidal and trapezoidal references. Performance is evaluated for total harmonic distortion, output voltage, crest factor, and distortion factor for modulation indices from 0.7 to 1. It is observed that phase disposition PWM with trapezoidal reference provides the lowest distortion while carrier overlapping PWM with trapezoidal reference provides the highest fundamental output voltage.