The document provides information about the Motorola 68020 microprocessor. It discusses the history and development of the 68020, which was Motorola's first 32-bit implementation of the M68000 family. Key details about the 68020's architecture, instruction set, registers, performance improvements over earlier chips, and technical specifications are summarized. Literature on the 68020 is also reviewed briefly.

1. MOTOROLA
Presented By: Group 1
Microprocessor and Microcontroller - (EC 403)
Ipsita Raha • Arnab Chatterjee • Arijit Dhali
11500230054 • 11500320076 • 11500320078
68020

2. 01
THESIS
Technical data of MC68020,
its improvement and
architecture has been
discussed in this section
CONCLUSION
In this section the
presentation has been
concluded along with
its references
INTRODUCTORY
A brief introduction
is stated along with
its history of origin
02 03
CONTENTS

3. ABSTRACT
This presentation gives the general
description of the MC68020, the first
32-bit microprocessor within the
Motorola M68000 family. It is a clear
and comprehensive introduction to
the main capabilities of the MC68020
along with its architecture and
improvements.

4. The MC68020 is the first full 32-bit implementation
of the M68000 family of microprocessors from
Motorola. The MC68020 is implemented with 32-bit
registers and data paths, 32-bit addresses, a rich
instruction set, and versatile addressing mode. Also
it has an ALU natively 32-bit, so can perform 32-bit
operations in one clock cycle.
INTRODUCTION

5. HISTORY
Development on the 68000 began in 1976 as the Motorola
Advanced Computer System on Silicon (MACSS) project to create a
new design to replace the Motorola 6800, which had been
surpassed by competitors such as the MOS 6502. It contained a 32-
bit instruction set which ran at high speeds for the era, a 24-bit
address bus which could address up to 16 MB of RAM, and 16-
bit external data bus. It was then commercially available from 1979.
Later in 1982, Motorola 68010 was released. It was a modestly
updated version, which was not used in any Macintosh model.
However in 1984, a lower cost version was also made available,
known as the 68EC020. In keeping with naming practices common
to Motorola designs, the 68020 is usually referred to as the "020“ or
“oh-two-oh”. It is a fully 32-bit version with a 3-stage pipeline, used
in the Macintosh II and Macintosh LC.

6. TECHNICAL DATA
Formal name MC68020
CPU Clock Rate 12.5, 16.67, 20, 25, 33 MHz (minimum 8 MHz, no on-chip clock generation)
Voltage supply 5 V
Maximum power 1.75 W
Production process HCMOS, 3/8" silicon piece
Chip Carrier PGA 169 (114 pins used) 34.16 mm × 34.16 mm (53 °C/W without heatsink)
Address bus
32-bit (4 GB directly linear addressable), [68EC020] 24-bit (16 MB
addressable)
Data bus 32-bit
Instruction Set 101 CISC instructions
Cache 256 byte instruction cache
Register
•7 for Address operations (32-bit)
•8 for Data operations (32-bit)
Branch handling
Branch prediction: Fixed branch prediction, branch-never-taken
approach
Transistors ~200,000
Performance 10 MIPS @ 33 MHz

7. LITERATURE SURVEY
Motorola 68020 (MC68020) is a 32-bit microprocessor compatible with earlier members of
680x0 family -68000, 68008 and 68010.
Motorola 68020 enhancements include:
● Execution time of many instructions was reduced.
● 256-byte instruction cache added to improve CPU performance.
● Includes new control registers.
● CPU has new addressing modes: memory indirect addressing modes, scaled index, and
larger displacements.
● New instructions were added to 68020 instruction set: bit field instructions, compare
instructions, call module and pack/unpack BCD.
● The MC68020 provides hardware support for Motorola 68881 and 68882 Floating-Point Units.
● Accessing mis-aligned word or long-word data no longer results in a system error, though
access to misaligned data is not as fast as access to properly aligned data.

8. REGISTERS OF MC68020
D0
D1
D2
D3
D4
D5
D6
D7
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
A0 Address 0
A1 Address 1
A2 Address 2
A3 Address 3
A4 Address 4
A5 Address 5
A6 Address 6
A7/USP Stack pointer (user)
A7’/SSP Stack Pointer (supervisor)
PC Program Counter
0 0 0 X N Z V C
S M 0 I
T CCR
Data Registers
Address Registers
Stack Pointers
Program Counter
Condition Code Register
 Data Register:
Ranging from D0 to D7, data registers store the data being
transferred to and from the immediate access storage.
 Address Register:
Ranging from A0 to A6, address register stores either the
memory address from which data will be fetched in the CPU,
or the address to which data will be sent and stored.
 User Stack Pointer:
These are 3 small registers that store the address of the last
program request in a stack.
 Program Counter:
It contains the address of the instruction being executed at
the current time.
 Condition Code Register:
It is used for storing the current values of the condition codes.

9. BLOCK DIAGRAM OF
MC68020
Execution Unit
Program
Counter
Section
Sequence and Control
Instruction Pipe
Bus Controller
Control Store
Control Logic
Write Pending
Buffer
Prefetch
Pending Buffer
Microbus
Control Logic
Instruction
Cache
Size
Multiplexer
Data
Pads
Cache
Holding
Register
(CAHR)
Misalignment
Multiplexer
Address
Section
Data
Section
Address
Pads
Stage
B
Stage
C
Stage
D
Address
Bus
Instruction
Address Bus
Address
Bus
Internal
Data Bus Data Bus
32-Bit
32-Bit
Bus Control
Signals
Internal Circuitry of
MC68020

10. PIN DIAGRAM
A0-A31
D0-D31
SIZ0-SIZ1
ECS
OCS
FC0 − FC2
R/ ഥ
W
AS
DS
DBEN
RMC
DSACK0 −
DSACK1
IPL0 − IPL2
IPEND
AVEC
BR
BG
BGACK
32
32
2
3
3
2
ADDRESSING
DATA
SIZE
BUS
CONTROL
INTERRUPTS
BUS
ARBITRATION
∅ +5𝑉

11. CONCLUSION
Motorola 68020 (MC68020) is a 32-bit microprocessor compatible
with earlier members of 680x0 family - 68000, 68008 and 68010.
Address bus width on the 68020 is increased to 32 bits, which
allows the processor to address up to 4 GB of memory. Data bus
width is also increased to 32 bits, though if necessary the 68020
can work with 8- and 16-bit data buses.

12. ACKNOWLEDGEMENT
We would like to express our special thanks of gratitude to
our Microprocessor and Microcontroller Teacher, Dr. Debarati
Dey, who gave us the golden opportunity to do this
wonderful project on the topic, Motorola 68020, which also
helped us in doing a lot of Research and we came to know
about so many new things, we are really thankful to her.
We are also thankful to our members who initiated their
responsibility for finishing this project within the limited time

13. REFERENCES
● Zoch, Cyndy. "The Motorola 68020." 32-Bit
microprocessors (1986): 163-209[3]
● Stephen Gilbert. “Motorola 68020”. Wikipedia (2001).
[4][5][6][8]
● CPU World. “Motorola 68020 (MC68020) microprocessor
family”. CPU World (2021). [7][11]
● Thomas Starnes, John Wiley & Sons. “Motorola 68000.”
Apple Wiki, Google Books (2018). [5]
● Motorola. “MC68020 MC68EC020 Microprocessors User’s
Manual First Edition.” Motorola Inc. (1992): 1.2-3.1. [4][8][9][10]

14. THANK YOU
For giving your precious time
towards our presentation